An integrate-and-dump receiver for high dynamic range photonic analog-to-digital conversion

Author(s):  
Timothy D. Gathman ◽  
James F. Buckwalter
1999 ◽  
Vol 9 (2) ◽  
pp. 3157-3160 ◽  
Author(s):  
A. Hodge Worsham ◽  
D.L. Miller ◽  
P.D. Dresselhaus ◽  
A.H. Miklich ◽  
J.X. Przybysz

Author(s):  
N. A. Lukin ◽  
◽  
L. S. Rubin ◽  

The main results of the development of a precision low-current meter based on a nonlinear ADC are presented. It is shown that the application of the method of nonlinear analog-to-digital conversion and a controlled voltage level at the non-inverting input of an integrating operational amplifier allows both high sensitivity and a wide dynamic range with a small spread of output codes. The use of the laboratory sample of the meter for cyclic tensile testing of steel specimens is described.


2009 ◽  
Vol 19 (3) ◽  
pp. 670-675 ◽  
Author(s):  
A. Inamdar ◽  
S. Rylov ◽  
A. Talalaevskii ◽  
A. Sahu ◽  
S. Sarwana ◽  
...  

2021 ◽  
Author(s):  
Yong Chen

This thesis deals with the designing of CMOS image sensors with in-pixel analog-to-digital conversion. A 2-stage memory write scheme for Pulse-Width-Modulation digital pixel sensors is proposed. It utilizes the characteristics of Gray-code counters and partitions a single data write operation into two separated write operations such that the size of the in-pixel memory can be significantly reduced. A Pulse-Frequency-Modulation pixel significantly reduces the integration time without sacrificing the dynamic range. Finally, a Pulse-Frequency-Modulation Digital Pixel Sensor with an in-pixel variable reference voltage is proposed. As compared with conventional Pulse-Frequency-Modulation pixels, the proposed architecture improves the dynamic range by adaptively adjusting the reference voltage in the pixel. All proposed digital pixel sensors are designed in TSMC-0.18μm 6-Metal 1-Poly 1.8 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3V3 device models. The effectiveness of the proposed digital pixel sensors is validated using simultation.


2018 ◽  
Vol 245 ◽  
pp. 10003
Author(s):  
Stanislav Gritsutenko

A method is proposed to significantly increase the dynamic range of current and voltage meters in the traction networks of railway transport. The method is based on the low entropy of signals of this type and is based on the calculation of samples whose amplitude was distorted due to the output beyond the ADC dynamic range. The approach with the solution of system of linear equations is considered. An approach without solving a system of linear equations is presented. The accuracy of the method is discussed at the end of the article.


2012 ◽  
Vol 229-231 ◽  
pp. 1499-1502
Author(s):  
Bin Xu ◽  
Yong Gang Yuan ◽  
Ding Ma ◽  
Neng Bin Cai ◽  
Xiang Yang Li

An array of 128×128 digital pixel sensors (DPS) that performs both in pixel light current integration and analog-to-digital conversion is presented. The pixel fabricated on a DP4M CMOS process provides a digital output of ultraviolet light intensity via an integrated multiple-channel bit-serial (MCBS) ADC. Due to low light current (~pA) of ultraviolet focal-plane-array, the architecture of capacitive trans-impedance amplifier (CTIA) is used. The proposed readout integrated circuits have a 12-bit resolution, 70dB dynamic range and 99% of linearity.


2021 ◽  
Author(s):  
Yong Chen

This thesis deals with the designing of CMOS image sensors with in-pixel analog-to-digital conversion. A 2-stage memory write scheme for Pulse-Width-Modulation digital pixel sensors is proposed. It utilizes the characteristics of Gray-code counters and partitions a single data write operation into two separated write operations such that the size of the in-pixel memory can be significantly reduced. A Pulse-Frequency-Modulation pixel significantly reduces the integration time without sacrificing the dynamic range. Finally, a Pulse-Frequency-Modulation Digital Pixel Sensor with an in-pixel variable reference voltage is proposed. As compared with conventional Pulse-Frequency-Modulation pixels, the proposed architecture improves the dynamic range by adaptively adjusting the reference voltage in the pixel. All proposed digital pixel sensors are designed in TSMC-0.18μm 6-Metal 1-Poly 1.8 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3V3 device models. The effectiveness of the proposed digital pixel sensors is validated using simultation.


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