Analysis and Implementation of a Hybrid DC Converter with Wide Voltage Variation

A new hybrid DC converter is proposed and implemented to have wide voltage variation operation and bidirectional power flow capability for photovoltaic power applications. The hybrid DC converter, including a half- or full-bridge resonant circuit, is adopted to realize the bidirectional power operation and low switching losses. To overcome the wide voltage variation problem (60 V–480 V) from photovoltaic panels due to sunlight intensity, the full-bridge structure or half-bridge structure resonant circuit is used in the presented converter to implement high or low voltage gain under a low or high input voltage condition. Using a pulse frequency modulation (PFM) scheme, the voltage transfer function of the resonant circuit is controlled to regulate the load voltage. Due to the symmetric circuit structures used on the primary and the secondary sides in the proposed converter, the bidirectional power flow can be achieved with the same circuit characteristics. Therefore, the proposed converter can be applied to battery stacks to achieve charger and discharger operations. Finally, a 400 W prototype is implemented, and the performance of the proposed hybrid DC converter is confirmed by the experiments.

An Overview of Fully Integrated Switching Power Converters Based on Switched-Capacitor versus Inductive Approach and Their Advanced Control Aspects

This paper reviews and discusses the state of the art of integrated switched-capacitor and integrated inductive power converters and provides a perspective on progress towards the realization of efficient and fully integrated DC–DC power conversion. A comparative assessment has been presented to review the salient features in the utilization of transistor technology between the switched-capacitor and switched inductor converter-based approaches. First, applications that drive the need for integrated switching power converters are introduced, and further implementation issues to be addressed also are discussed. Second, different control and modulation strategies applied to integrated switched-capacitor (voltage conversion ratio control, duty cycle control, switching frequency modulation, Ron modulation, and series low drop out) and inductive converters (pulse width modulation and pulse frequency modulation) are then discussed. Finally, a complete set of integrated power converters are related in terms of their conditions and operation metrics, thereby allowing a categorization to provide the suitability of converter technologies.

CMOS Digital Pixel Sensors With In-Pixel Analog-To-Digital Conversion

This thesis deals with the designing of CMOS image sensors with in-pixel analog-to-digital conversion. A 2-stage memory write scheme for Pulse-Width-Modulation digital pixel sensors is proposed. It utilizes the characteristics of Gray-code counters and partitions a single data write operation into two separated write operations such that the size of the in-pixel memory can be significantly reduced. A Pulse-Frequency-Modulation pixel significantly reduces the integration time without sacrificing the dynamic range. Finally, a Pulse-Frequency-Modulation Digital Pixel Sensor with an in-pixel variable reference voltage is proposed. As compared with conventional Pulse-Frequency-Modulation pixels, the proposed architecture improves the dynamic range by adaptively adjusting the reference voltage in the pixel. All proposed digital pixel sensors are designed in TSMC-0.18μm 6-Metal 1-Poly 1.8 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3V3 device models. The effectiveness of the proposed digital pixel sensors is validated using simultation.

CMOS Digital Pixel Sensors With In-Pixel Analog-To-Digital Conversion

This thesis deals with the designing of CMOS image sensors with in-pixel analog-to-digital conversion. A 2-stage memory write scheme for Pulse-Width-Modulation digital pixel sensors is proposed. It utilizes the characteristics of Gray-code counters and partitions a single data write operation into two separated write operations such that the size of the in-pixel memory can be significantly reduced. A Pulse-Frequency-Modulation pixel significantly reduces the integration time without sacrificing the dynamic range. Finally, a Pulse-Frequency-Modulation Digital Pixel Sensor with an in-pixel variable reference voltage is proposed. As compared with conventional Pulse-Frequency-Modulation pixels, the proposed architecture improves the dynamic range by adaptively adjusting the reference voltage in the pixel. All proposed digital pixel sensors are designed in TSMC-0.18μm 6-Metal 1-Poly 1.8 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3V3 device models. The effectiveness of the proposed digital pixel sensors is validated using simultation.

PV String‐Level Isolated DC–DC Power Optimizer with Wide Voltage Range

This paper proposes a photovoltaic (PV) string-level isolated DC–DC power optimizer with wide voltage range. A hybrid control scheme in which pulse frequency modulation (PFM) control and pulse width modulation (PWM) control are combined with a variable switching frequency is employed to regulate the wide PV voltage range. By adjusting the switching frequency in the above region during the PWM control process, the circulating current period can be eliminated and the turn-on period of the bidirectional switch of the dual-bridge LLC (DBLLC) resonant converter is reduced compared to that with a conventional PWM control scheme with a fixed switching frequency, resulting in better switching and conduction loss. Soft start-up control under a no-load condition is proposed to charge the DC-link electrolytic capacitor from 0 V. A laboratory prototype of a 6.25 kW DBLLC resonant converter with a transformer, including integrated resonant inductance, is built and tested in order to verify the performance and theoretical claims.

A PWM/PFM Dual-Mode DC-DC Buck Converter with Load-Dependent Efficiency-Controllable Scheme for Multi-Purpose IoT Applications

This paper presents a dual-mode DC-DC buck converter including a load-dependent, efficiency-controllable scheme to support multi-purpose IoT applications. For light-load applications, a selectable adaptive on-time pulse frequency modulation (PFM) control is proposed to achieve optimum power efficiency by selecting the optimum switching frequency according to the load current, thereby reducing unnecessary switching losses. When the inductor peak current value or converter output voltage ripple are considered in some applications, its on-time can be adjusted further. In heavy-load applications, a conventional pulse width modulation (PWM) control scheme is adopted, and its gate driver is structured to reduce dynamic current, preventing the current from shooting through the power switch. A proposed dual-mode buck converter prototype is fabricated in a 180 nm CMOS process, achieving its measured maximum efficiency of 95.7% and power density of 0.83 W/mm2.

A general framework for automatic closed-loop control of bladder voiding induced by intraspinal microstimulation in rats

Individuals with spinal cord injury or neurological disorders have problems in voiding function due to the dyssynergic contraction of the urethral sphincter. Here, we introduce a closed-loop control of intraspinal microstimulation (ISMS) for efficient bladder voiding. The strategy is based on asynchronous two-electrode ISMS with combined pulse-amplitude and pulse-frequency modulation without requiring rhizotomy, neurotomy, or high-frequency blocking. Intermittent stimulation is alternately applied to the two electrodes that are implanted in the S2 lateral ventral horn and S1 dorsal gray commissure, to excite the bladder motoneurons and to inhibit the urethral sphincter motoneurons. Asynchronous stimulation would lead to reduce the net electric field and to maximize the selective stimulation. The proposed closed-loop system attains a highly voiding efficiency of 77.2–100%, with an average of 91.28 ± 8.4%. This work represents a promising approach to the development of a natural and robust motor neuroprosthesis device for restoring bladder functions.