scholarly journals Analog-to-digital conversion that allows to increase the dynamic range a standard ADC using the properties of electrical signals

2018 ◽  
Vol 245 ◽  
pp. 10003
Author(s):  
Stanislav Gritsutenko
Keyword(s):  
Dynamic Range ◽  
Linear Equations ◽  
Railway Transport ◽  
System Of Linear Equations ◽  
Digital Conversion ◽  
Analog To Digital ◽  
Electrical Signals ◽  
Analog To Digital Conversion ◽  
Low Entropy

A method is proposed to significantly increase the dynamic range of current and voltage meters in the traction networks of railway transport. The method is based on the low entropy of signals of this type and is based on the calculation of samples whose amplitude was distorted due to the output beyond the ADC dynamic range. The approach with the solution of system of linear equations is considered. An approach without solving a system of linear equations is presented. The accuracy of the method is discussed at the end of the article.

scholarly journals A precision low-frequency Analog-to-Digital converter for advanced systems of technical diagnostics and nondestructive testing

2020 ◽  
pp. 6-16
Author(s):  
N. A. Lukin ◽  
◽  
L. S. Rubin ◽  
Keyword(s):  
Dynamic Range ◽  
Low Frequency ◽  
High Sensitivity ◽  
Technical Diagnostics ◽  
Digital Conversion ◽  
Wide Dynamic Range ◽  
Voltage Level ◽  
Analog To Digital ◽  
Analog To Digital Conversion ◽  
Nonlinear Analog

The main results of the development of a precision low-current meter based on a nonlinear ADC are presented. It is shown that the application of the method of nonlinear analog-to-digital conversion and a controlled voltage level at the non-inverting input of an integrating operational amplifier allows both high sensitivity and a wide dynamic range with a small spread of output codes. The use of the laboratory sample of the meter for cyclic tensile testing of steel specimens is described.

scholarly journals CMOS Digital Pixel Sensors With In-Pixel Analog-To-Digital Conversion

2021 ◽  
Author(s):  
Yong Chen
Keyword(s):  
Frequency Modulation ◽  
Dynamic Range ◽  
Pulse Frequency ◽  
Reference Voltage ◽  
Pulse Frequency Modulation ◽  
Digital Conversion ◽  
Analog To Digital ◽  
Analog To Digital Conversion ◽  
Pixel Sensors ◽  
Digital Pixel

This thesis deals with the designing of CMOS image sensors with in-pixel analog-to-digital conversion. A 2-stage memory write scheme for Pulse-Width-Modulation digital pixel sensors is proposed. It utilizes the characteristics of Gray-code counters and partitions a single data write operation into two separated write operations such that the size of the in-pixel memory can be significantly reduced. A Pulse-Frequency-Modulation pixel significantly reduces the integration time without sacrificing the dynamic range. Finally, a Pulse-Frequency-Modulation Digital Pixel Sensor with an in-pixel variable reference voltage is proposed. As compared with conventional Pulse-Frequency-Modulation pixels, the proposed architecture improves the dynamic range by adaptively adjusting the reference voltage in the pixel. All proposed digital pixel sensors are designed in TSMC-0.18μm 6-Metal 1-Poly 1.8 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3V3 device models. The effectiveness of the proposed digital pixel sensors is validated using simultation.

Readout Integrated Circuits with Pixel-Level ADC for Ultraviolet FPA Applications

2012 ◽  
Vol 229-231 ◽  
pp. 1499-1502
Author(s):  
Bin Xu ◽  
Yong Gang Yuan ◽  
Ding Ma ◽  
Neng Bin Cai ◽  
Xiang Yang Li
Keyword(s):  
Integrated Circuits ◽  
Dynamic Range ◽  
Cmos Process ◽  
Low Light ◽  
Digital Conversion ◽  
Analog To Digital ◽  
Multiple Channel ◽  
Analog To Digital Conversion ◽  
Pixel Sensors ◽  
Digital Pixel

An array of 128×128 digital pixel sensors (DPS) that performs both in pixel light current integration and analog-to-digital conversion is presented. The pixel fabricated on a DP4M CMOS process provides a digital output of ultraviolet light intensity via an integrated multiple-channel bit-serial (MCBS) ADC. Due to low light current (~pA) of ultraviolet focal-plane-array, the architecture of capacitive trans-impedance amplifier (CTIA) is used. The proposed readout integrated circuits have a 12-bit resolution, 70dB dynamic range and 99% of linearity.

scholarly journals CMOS Digital Pixel Sensors With In-Pixel Analog-To-Digital Conversion

2021 ◽  
Author(s):  
Yong Chen
Keyword(s):  
Frequency Modulation ◽  
Dynamic Range ◽  
Pulse Frequency ◽  
Reference Voltage ◽  
Pulse Frequency Modulation ◽  
Digital Conversion ◽  
Analog To Digital ◽  
Analog To Digital Conversion ◽  
Pixel Sensors ◽  
Digital Pixel

This thesis deals with the designing of CMOS image sensors with in-pixel analog-to-digital conversion. A 2-stage memory write scheme for Pulse-Width-Modulation digital pixel sensors is proposed. It utilizes the characteristics of Gray-code counters and partitions a single data write operation into two separated write operations such that the size of the in-pixel memory can be significantly reduced. A Pulse-Frequency-Modulation pixel significantly reduces the integration time without sacrificing the dynamic range. Finally, a Pulse-Frequency-Modulation Digital Pixel Sensor with an in-pixel variable reference voltage is proposed. As compared with conventional Pulse-Frequency-Modulation pixels, the proposed architecture improves the dynamic range by adaptively adjusting the reference voltage in the pixel. All proposed digital pixel sensors are designed in TSMC-0.18μm 6-Metal 1-Poly 1.8 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3V3 device models. The effectiveness of the proposed digital pixel sensors is validated using simultation.

scholarly journals Expansion of dynamic range of sampling and storage device by weight integration of narrow-band oscillation

2021 ◽  
pp. 80-82
Author(s):  
B. D. Zhenatov ◽  
Keyword(s):  
Dynamic Range ◽  
Narrow Band ◽  
Storage Device ◽  
Digital Conversion ◽  
Digital Radio ◽  
Analog To Digital ◽  
Radio Receivers ◽  
Analog To Digital Conversion ◽  
Digital Radio Receivers ◽  
And Storage

The most bottleneck of high-frequency digital radio receivers in terms of dynamic characteristics is the process of analog-to-digital conversion. Most often, to meet the requirements for the speed and dynamic range of the analog-to-digital conversion, a sampling and storage device (UHF) is included in front of the analog-to-digital converter (ADC), which is significantly simpler in structure than the ADC structure, but reduces the requirements for its speed and dynamic range [1, 2]. A method for expanding the dynamic range of the integrating sampling and storage device for digital radio receivers using the weight integration of the input narrow-band oscillation is proposed

Advanced Analog-to-Digital Conversion Using Voltage-to-Frequency Converters for Remote Sensors

2008 ◽  
Vol 381-382 ◽  
pp. 623-626 ◽  
Author(s):  
Sergey Y. Yurish
Keyword(s):  
High Performance ◽  
Frequency Conversion ◽  
Dynamic Range ◽  
Low Cost ◽  
Frequency Converter ◽  
Charge Balance ◽  
Digital Conversion ◽  
Analog To Digital ◽  
Remote Sensors ◽  
Analog To Digital Conversion

This paper presents an advanced analog-to-digital conversion technique based on a voltage-to-frequency-to-digital conversion that is suitable for remote sensors, telemetry applications and multichannel data acquisition systems. A voltage-to-frequency conversion part can be based, for example, on high performance, charge-balance voltage-to-frequency converter (VFC), where monostable is replaced by a bistable, driven by an external clock, or other existing high performance VFCs. The frequency-to-digital converter “bottleneck” problem in such promised ADC scheme was solved due to proposed advanced method of the dependent count for frequency-to-digital conversion. This ADC technique lets receive many advantages such as high accuracy, relatively low power consumption, low cost solution, wide dynamic range, great stability and faster conversion time in comparison with existing VFC-based techniques. The conversion rate (6.25 µs to 6.25 ms) in such ADC scheme is programmable, non-redundant, shorter than for pulse counting technique and comparable with successive-approximation and Σ- ADC.

Energy Harvesting via Analog-to-Digital Conversion

2021 ◽  
Author(s):  
Neha Jain ◽  
Nir Shlezinger ◽  
Yonina C. Eldar ◽  
Anubha Gupta ◽  
Vivek Ashok Bohara
Keyword(s):  
Energy Harvesting ◽  
Digital Conversion ◽  
Analog To Digital ◽  
Analog To Digital Conversion
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