scholarly journals Fabrication Process and Properties of Fully-Planarized Deep-Submicron Nb/Al– $\hbox{AlO}_{\rm x}\hbox{/Nb} $ Josephson Junctions for VLSI Circuits

2015 ◽  
Vol 25 (3) ◽  
pp. 1-12 ◽  
Author(s):  
Sergey K. Tolpygo ◽  
Vladimir Bolkhovsky ◽  
Terence J. Weir ◽  
Leonard M. Johnson ◽  
Mark A. Gouker ◽  
...  
Keyword(s):  
Josephson Junctions ◽  
Deep Submicron ◽  
Vlsi Circuits ◽  
Fabrication Process

Reliability-Driven CAD System for Deep-Submicron VLSI Circuits

1998 ◽  
Author(s):  
S. M. Kang ◽  
E. Rosenbaum ◽  
Y. K. Cheng ◽  
L. P. Yuan ◽  
T. Li
Keyword(s):  
Deep Submicron ◽  
Vlsi Circuits ◽  
Cad System

Improved reproducible fabrication process of HTS-SQUIDs with ramp-edge Josephson junctions and multilayer structures

2010 ◽  
Vol 470 (20) ◽  
pp. 1515-1519 ◽  
Author(s):  
S. Adachi ◽  
Y. Oshikubo ◽  
A. Tsukamoto ◽  
Y. Ishimaru ◽  
T. Hato ◽  
...  
Keyword(s):  
Josephson Junctions ◽  
Fabrication Process ◽  
Multilayer Structures

scholarly journals An Efficient Power Optimized 32 bit BCD Adder Using Multi-Channel Technique

2017 ◽  
Vol 6 (02) ◽  
pp. 07-12
Author(s):  
Diksha Siddhamshittiwar
Keyword(s):  
Average Power ◽  
Full Adder ◽  
Deep Submicron ◽  
Power Reduction ◽  
Vlsi Circuits ◽  
Power Gating ◽  
Static Power ◽  
Simulation Results ◽  
Efficient Power ◽  
Standby Mode

Static power reduction is a challenge in deep submicron VLSI circuits. In this paper 28T full adder circuit, 14T full adder circuit and 32 bit power gated BCD adder using the full adders respectively were designed and their average power was compared. In existing work a conventional full adder is designed using 28T and the same is used to design 32 bit BCD adder. In the proposed architecture 14T transmission gate based power gated full adder is used for the design of 32 bit BCD adder. The leakage supremacy dissipated during standby mode in all deep submicron CMOS devices is reduced using efficient power gating and multi-channel technique. Simulation results were obtained using Tanner EDA and TSMC_180nm library file is used for the design of 28T full adder, 14T full adder and power gated BCD adder and a significant power reduction is achieved in the proposed architecture.

scholarly journals A cross-whiskers junction as a novel fabrication process for intrinsic Josephson junctions

2001 ◽  
Vol 14 (9) ◽  
pp. 765-769 ◽  
Author(s):  
Yoshihiko Takano ◽  
Takeshi Hatano ◽  
Akihiro Fukuyo ◽  
Akira Ishii ◽  
Shunichi Arisawa ◽  
...  
Keyword(s):  
Josephson Junctions ◽  
Fabrication Process ◽  
Intrinsic Josephson Junctions

Adaptive Thermal Monitoring of Deep-Submicron CMOS VLSI Circuits

2013 ◽  
Vol 9 (4) ◽  
pp. 403-413
Author(s):  
Amir Zjajo ◽  
Nick van der Meijs ◽  
Rene van Leuken
Keyword(s):  
Deep Submicron ◽  
Vlsi Circuits ◽  
Thermal Monitoring ◽  
Submicron Cmos ◽  
Cmos Vlsi
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