PRESERVE: Static Test Compaction that Preserves Individual Numbers of Tests

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2020.3005371 ◽

2020 ◽

pp. 1-1

Author(s):

Irith Pomeranz

Keyword(s):

Static Test ◽

Test Compaction

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Static Test Compaction using Independent Suffixes of a Transparent-Scan Sequence

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2021.3073625 ◽

2021 ◽

pp. 1-1

Author(s):

Irith Pomeranz

Keyword(s):

Static Test ◽

Test Compaction

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A static test compaction technique for combinational circuits based on independent fault clustering

10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 ◽

10.1109/icecs.2003.1301757 ◽

2004 ◽

Author(s):

Y.E. Osais ◽

A.H. El-Maleh

Keyword(s):

Combinational Circuits ◽

Static Test ◽

Test Compaction

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Static test compaction for scan-based designs to reduce test application time

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.741614 ◽

2002 ◽

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Application Time ◽

Static Test ◽

Test Compaction ◽

Test Application Time ◽

Test Application

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Restoration-Based Procedures With Set Covering Heuristics for Static Test Compaction of Functional Test Sequences

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2013.2253499 ◽

2014 ◽

Vol 22 (4) ◽

pp. 779-791 ◽

Author(s):

Irith Pomeranz

Keyword(s):

Functional Test ◽

Set Covering ◽

Static Test ◽

Test Compaction

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Static Test Compaction for Scan Circuits by Using Restoration to Modify and Remove Tests

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2014.2358932 ◽

2014 ◽

Vol 33 (12) ◽

pp. 1955-1964 ◽

Author(s):

Irith Pomeranz

Keyword(s):

Static Test ◽

Test Compaction ◽

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Static test compaction for IDDQ testing of sequential circuits

10.1109/iddq.1998.730725 ◽

2002 ◽

Author(s):

Y. Higami ◽

K.K. Saluja ◽

K. Kinoshita

Keyword(s):

Sequential Circuits ◽

Iddq Testing ◽

Static Test ◽

Test Compaction

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Static test compaction for delay fault test sets consisting of broadside and skewed-load tests

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783760 ◽

2011 ◽

Author(s):

Irith Pomeranz

Keyword(s):

Delay Fault ◽

Static Test ◽

Test Compaction ◽

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Vector replacement to improve static-test compaction for synchronous sequential circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.908476 ◽

2001 ◽

Vol 20 (2) ◽

pp. 336-342 ◽

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Sequential Circuits ◽

Static Test ◽

Test Compaction ◽

Synchronous Sequential Circuits

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Static Test Compaction for Low-Power Test Sets by Increasing the Switching Activity

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2014.2345762 ◽

2015 ◽

Vol 23 (9) ◽

pp. 1936-1940 ◽

Author(s):

Irith Pomeranz

Keyword(s):

Low Power ◽

Switching Activity ◽

Static Test ◽

Test Compaction ◽

Low Power Test ◽

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Static test compaction for full-scan circuits based on combinational test sets and non-scan sequential test sequences

16th International Conference on VLSI Design, 2003. Proceedings. ◽

10.1109/icvd.2003.1183159 ◽

2003 ◽

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Sequential Test ◽

Static Test ◽

Test Compaction ◽

Full Scan ◽

Test Sets ◽

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