scholarly journals A Built-In Self-Test and In Situ Analog Circuit Optimization Platform

2018 ◽  
Vol 65 (10) ◽  
pp. 3445-3458 ◽  
Author(s):  
Sanghoon Lee ◽  
Congyin Shi ◽  
Jiafan Wang ◽  
Adriana Sanabria ◽  
Hatem Osman ◽  
...  
Keyword(s):  
Analog Circuit ◽  
Circuit Optimization ◽  
Self Test ◽  
Built In Self Test

scholarly journals A ΣΔ Closed-Loop Interface for a MEMS Accelerometer with Digital Built-In Self-Test Function

Micromachines ◽  
2018 ◽  
Vol 9 (9) ◽  
pp. 444 ◽  
Author(s):  
Dongliang Chen ◽  
Xiaowei Liu ◽  
Liang Yin ◽  
Yinhang Wang ◽  
Zhaohe Shi ◽  
...  
Keyword(s):  
Closed Loop ◽  
Process Condition ◽  
Laboratory Equipment ◽  
Interface Circuit ◽  
Mems Accelerometer ◽  
Self Testing ◽  
Self Test ◽  
Built In Self Test ◽  
On Chip

Sigma-delta (ΣΔ) closed-loop operation is the best candidate for realizing the interface circuit of MEMS accelerometers. However, stability and reliability problems are still the main obstacles hindering its further development for high-end applications. In situ self-testing and calibration is an alternative way to solve these problems in the current process condition, and thus, has received a lot of attention in recent years. However, circuit methods for self-testing of ΣΔ closed-loop accelerometers are rarely reported. In this paper, we propose a fifth-order ΣΔ closed-loop interface for a capacitive MEMS accelerometer. The nonlinearity problem of the system is detailed discussed, the source of it is analyzed, and the solutions are given. Furthermore, a built-in self-test (BIST) unit is integrated on-chip for in situ self-testing of the loop distortion. In BIST mode, a digital electrostatic excitation is generated by an on-chip digital resonator, which is also ΣΔ modulated. By single-bit ΣΔ-modulation, the noise and linearity of excitation is effectively improved, and a higher detection level for distortion is easily achieved, as opposed to the physical excitation generated by the motion of laboratory equipment.

RF Phase Error Built-In-Self-Test for A GSM SOC

2008 ◽  
Vol 1 (4) ◽  
pp. 39-44
Author(s):  
Dallas Webster ◽  
Loi Phan ◽  
Oren Eliezer ◽  
Rick Hudgens ◽  
Donald Lie
Keyword(s):  
Phase Error ◽  
Self Test ◽  
Built In Self Test

Concepts for In Situ Diagnostics in Analog Microelectronic Circuits

2007 ◽  
Author(s):  
Ted Kolasa ◽  
Alfredo Mendoza
Keyword(s):  
Analog Circuits ◽  
System Architecture ◽  
Analog Circuit ◽  
Fault Localization ◽  
Diagnostic System ◽  
Diagnostic Capability ◽  
Common Signal ◽  
Diagnostic Capabilities ◽  
In Situ Diagnostics

Abstract Comprehensive in situ (designed-in) diagnostic capabilities have been incorporated into digital microelectronic systems for years, yet similar capabilities are not commonly incorporated into the design of analog microelectronics. And as feature sizes shrink and back end interconnect metallization becomes more complex, the need for effective diagnostics for analog circuits becomes ever more critical. This paper presents concepts for incorporating in situ diagnostic capability into analog circuit designs. Aspects of analog diagnostic system architecture are discussed as well as nodal measurement scenarios for common signal types. As microelectronic feature sizes continue to shrink, diagnostic capabilities such as those presented here will become essential to the process of fault localization in analog circuits.

Fault-based Built-in Self-test and Evaluation of Phase Locked Loops

2021 ◽  
Vol 26 (3) ◽  
pp. 1-18
Author(s):  
Mehmet Ince ◽  
Ender Yilmaz ◽  
Wei Fu ◽  
Joonsung Park ◽  
Krishnaswamy Nagaraj ◽  
...  
Keyword(s):  
Phase Locked Loops ◽  
Test And Evaluation ◽  
Self Test ◽  
Built In Self Test
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