A Constant-$g_{m}$ Constant-Slew-Rate Rail-to-Rail Input Stage With Static Feedback and Dynamic Current Steering for VLSI Cell Libraries

2007 ◽  
Vol 54 (1) ◽  
pp. 76-80 ◽  
Author(s):  
Tongyu Song ◽  
Jingyu Hu ◽  
Xiaohong Li ◽  
Shouli Yan
Keyword(s):  
Current Steering ◽  
Slew Rate ◽  
Input Stage ◽  
Rail To Rail ◽  
Static Feedback

scholarly journals A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate

2021 ◽  
Vol 11 (2) ◽  
pp. 19
Author(s):  
Francesco Centurelli ◽  
Riccardo Della Sala ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Alessandro Trifiletti
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Process ◽  
Slew Rate ◽  
Large Signal ◽  
Output Stage ◽  
Ultra Low Power ◽  
Input Stage ◽  
Rail To Rail

In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.

Constant-gm constant-slew-rate high-bandwidth low-voltage rail-to-rail cmos input stage for vlsi cell libraries

2003 ◽  
Vol 38 (8) ◽  
pp. 1364-1372 ◽  
Author(s):  
J.M. Carrillo ◽  
J.F. Duque-Carrillo ◽  
G. Torelli ◽  
J.L. Ausin
Keyword(s):  
Low Voltage ◽  
Slew Rate ◽  
Input Stage ◽  
Rail To Rail ◽  
High Bandwidth

HIGH-SLEW RATE LOW-QUIESCENT CURRENT RAIL-TO-RAIL CMOS BUFFER AMPLIFIER FOR FLAT PANEL DISPLAYS

2011 ◽  
Vol 20 (07) ◽  
pp. 1277-1286 ◽  
Author(s):  
MERIH YILDIZ ◽  
SHAHRAM MINAEI ◽  
EMRE ARSLAN
Keyword(s):  
Power Supply ◽  
Monte Carlo Analysis ◽  
Cmos Process ◽  
Flat Panel Displays ◽  
Slew Rate ◽  
Flat Panel ◽  
Output Stage ◽  
Rail To Rail ◽  
Buffer Amplifier ◽  
Quiescent Current

This work presents a high-slew rate rail-to-rail buffer amplifier, which can be used for flat panel displays. The proposed buffer amplifier is composed of two transconductance amplifiers, two current comparators and a push-pull output stage. Phase compensation technique is also used to improve the phase margin value of the proposed buffer amplifier for different load capacitances. Post-layout simulations of the proposed buffer amplifier are performed using 0.35 μm AMS CMOS process parameters and 3.3 V power supply. The circuit is tested under a 600 pF capacitive load. An average settling time of 0.85 μs under a full voltage swing is obtained, while only 3 μA quiescent current is drawn from the power supply. Monte Carlo analysis is also added to show the process variation effects on the circuit.

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