Study on High-Density Integration Resistive Random Access Memory Array From Multiphysics Perspective by Parallel Computing

2019 ◽  
Vol 66 (4) ◽  
pp. 1747-1753 ◽  
Author(s):  
Guodong Zhu ◽  
Wenchao Chen ◽  
Dawei Wang ◽  
Hao Xie ◽  
Zhenguo Zhao ◽  
...  
Keyword(s):  
Parallel Computing ◽  
Random Access ◽  
Random Access Memory ◽  
Resistive Random Access Memory ◽  
High Density ◽  
Access Memory ◽  
Memory Array

A SPICE Model of Resistive Random Access Memory for Large-Scale Memory Array Simulation

2014 ◽  
Vol 35 (2) ◽  
pp. 211-213 ◽  
Author(s):  
Haitong Li ◽  
Peng Huang ◽  
Bin Gao ◽  
Bing Chen ◽  
Xiaoyan Liu ◽  
...  
Keyword(s):  
Large Scale ◽  
Random Access ◽  
Random Access Memory ◽  
Resistive Random Access Memory ◽  
Access Memory ◽  
Memory Array ◽  
Spice Model

scholarly journals Highly Reliable Memory Operation of High Density Three-Terminal Thyristor Random Access Memory

2021 ◽  
Author(s):  
Hyangwoo Kim ◽  
Hyeonsu Cho ◽  
Hyeon-Tak Kwak ◽  
Myunghae Seo ◽  
Seungho Lee ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
High Density ◽  
Data Retention ◽  
Access Memory ◽  
Cathode Voltage ◽  
Cross Point ◽  
Memory Array ◽  
Retention Characteristics ◽  
Power Operation

Abstract Three-terminal (3-T) thyristor random-access memory is explored for a next generation high-density nanoscale vertical cross-point array. The effects of standby voltages on the device are thoroughly investigated in terms of gate-cathode voltage (VGC,ST) and anode- cathode voltage (VAC,ST) in the standby state for superior data retention characteristics and low-power operation. The device with the optimized VGC,ST of -0.4 V and VAC,ST of 0.6 V shows the continuous data retention capability without refresh operation with a low standby current of 1.14 pA. In addition, a memory array operation scheme of 3-T TRAM is proposed to address array disturbance issues. The presented array operation scheme can efficiently minimize program, erase and read disturbances on unselected cells by adjusting gate-cathode voltage. The standby voltage turns out to be beneficial to improve retention characteristics: over 10 s. With the proposed memory array operation, 3-T TRAM can provide excellent data retention characteristics and high-density memory configurations comparable with or surpass conventional dynamic random-access memory (DRAM) technology.

scholarly journals Stateful Logic Operations in One-Transistor-One- Resistor Resistive Random Access Memory Array

2019 ◽  
Vol 40 (9) ◽  
pp. 1538-1541 ◽  
Author(s):  
Wensheng Shen ◽  
Peng Huang ◽  
Mengqi Fan ◽  
Runze Han ◽  
Zheng Zhou ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Resistive Random Access Memory ◽  
Access Memory ◽  
Memory Array ◽  
Logic Operations

scholarly journals An overview of resistive random access memory based high-density crossbar array

2018 ◽  
Vol 63 (28-29) ◽  
pp. 2954-2966
Author(s):  
Xiaoyan Li ◽  
Yingtao Li ◽  
Xiaoping Gao ◽  
Chuanbing Chen ◽  
Genliang Han
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Resistive Random Access Memory ◽  
High Density ◽  
Access Memory ◽  
Crossbar Array
Sign in / Sign up

Export Citation Format

Share Document