Artificially created interfacial states enabled van der Waals heterostructure memory device

Two-dimensional (2D) interface plays a predominate role in determining the performance of a device that is configured as a van der Waals heterostructure (vdWH). Intensive efforts have been devoted to suppressing the emergence of interfacial states during vdWH stacking process, which facilitates the charge interaction and transfer between the heterostructure layers. However, the effective generation and modulation of the vdWH interfacial states could give rise to a new design and architecture of 2D functional devices. Here, we report a 2D non-volatile vdWH memory device enabled by the artificially created interfacial states between hexagonal boron nitride (hBN) and molybdenum ditelluride (MoTe2). The memory originates from the microscopically coupled optical and electrical responses of the vdWH, with the high reliability reflected by its long data retention time over 10^4 s and large write-erase cyclic number exceeding 100. Moreover, the storage currents in the memory can be precisely controlled by the writing and erasing gates, demonstrating the tunability of its storage states. The vdWH memory also exhibits excellent robustness with wide temperature endurance window from 100 K to 380 K, illustrating its potential application in harsh environment. Our findings promise interfacial-states engineering as a powerful approach to realize high performance vdWH memory device, which opens up new opportunities for its application in 2D electronics and optoelectronics.

Performance Improvement in E-Gun Deposited SiOx- Based RRAM Device by Switching Material Thickness Reduction

A performance improvement by reduction in switching material thickness in a e-gun deposited SiOx based resistive switching memory device was investigated. Reduction in thickness cause thinner filamentary path formation during ON-state by controlling the vacancy defects. Thinner filament cause lowering of operation current from 500 μA to 100 μA and also improves the reset current (from >400 μA to <100 μA). Switching material thickness reduction also cause the forming free ability in the device. All these electrical parametric improvements enhance the device reliability performances. The device show >200 dc endurance, >3-hour data retention and >1000 P/E endurance with 100 ns pulses.

Applicability of ePrivacy Directive to national data retention measures following invalidation of the Data Retention Directive

The paper analyses rules pertinent for examination of national data retention measures regulating data processing activities of providers of electronic communication services following invalidation of the Data Retention Directive in 2014, on which subject the CJEU issued a total of five judgments up until June 2021. Focus of this analysis is the issue of applicability of EU law as interpreted in the CJEU case law, most specifically Article 15, paragraph 1 of the ePrivacy Directive containing legal safeguards for the restrictions of rights and obligations in that directive on the confidentiality of communications as well as the processing of traffic and location data. Such restrictions are as a rule manifested in different national data retention measures, which may pursue law enforcement and public security, as well as national security objectives. This examination is supported also by analysis of rules on the scope of ePrivacy Directive and its relationship with the general personal data protection framework. Overall findings in the paper provide a frame for further detailed research on the topic of future regulation of retention measures at national/EU level (Proposal for ePrivacy Regulation, possible new EU data retention legislation) and a comparative assessment of relevant CJEU jurisprudence with that of the European Court of Human Rights in respect of compatibility of retention measures with the guarantees of fundamental rights and freedoms and allowed restrictions thereof in the European legal system.

Recent Progress on 3D NAND Flash Technologies

Since 3D NAND was introduced to the industry with 24 layers, the areal density has been successfully increased more than ten times, and has exceeded 10 Gb/mm2 with 176 layers. The physical scaling of XYZ dimensions including layer stacking and footprint scaling enabled the density scaling. Logical scaling has been successfully realized, too. TLC (triple-level cell, 3 bits per cell) is now the mainstream in 3D NAND, while QLC (quad-level cell, 4 bits per cell) is increasing the presence. Several attempts and partial demonstrations were made for PLC (penta-level cell, 5 bits per cell). CMOS under array (CuA) enabled the die size reduction and performance improvements. Program and erase schemes to address the technology challenges such as short-term data retention of the charge-trap cell and the large block size are being investigated.

Using child-friendly movie stimuli to study the development of face, place, and object regions from age 3 to 12 years

Scanning young children while watching short, engaging, commercially-produced movies has emerged as a promising approach for increasing data retention and quality. Movie stimuli also evoke a richer variety of cognitive processes than traditional experiments - allowing the study of multiple aspects of brain development simultaneously. However, because these stimuli are uncontrolled, it is unclear how effectively distinct profiles of brain activity can be distinguished from the resulting data. Here we develop an approach for identifying multiple distinct subject-specific Regions of Interest (ssROIs) using fMRI data collected during movie-viewing. We focused on the test case of higher-level visual regions selective for faces, scenes, and objects. Adults (N=13) were scanned while viewing a 5.5 minute child-friendly movie, as well as a traditional experiment with isolated faces, scenes, and objects. We found that just 2.7 minutes of movie data could identify subject-specific face, scene, and object regions. While successful, the movie approach was still less effective than a traditional localizer. Having validated our approach in adults, we then used the same methods on movie data collected from 3-12-year-old children (N=122). Movie response timecourses in 3-year-old childrens face, scene, and object regions were already significantly and specifically predicted by timecourses from the corresponding regions in adults. We also found evidence of continued developmental change, particularly in the face-selective posterior superior temporal sulcus. Taken together, our results reveal both early maturity and functional change in face, scene, and object regions, and more broadly highlight the promise of short, child-friendly movies for developmental cognitive neuroscience.

National Security and Retention of Telecommunications Data in Light of Recent Case Law of the European Courts

The Court of Justice is once again clarifying the limits of the application of data retention laws – General obligation to retain data exceeds the limits of what is strictly necessary within a democratic society – The national security exception does not preclude a judicial assessment of the legitimacy of its application – The existence of a genuine and specific threat as a premise for the use of untargeted data retention measures – The possibility of searching for the gold standard of data retention based on algorithmic processing – Different perceptions of the Court of Justice position by the referring courts – The Conseil d'État’s position distorts the idea of the protection of fundamental rights that is enshrined in the EU legal order

Physical and Electrical Analysis of Poly-Si Channel Effect on SONOS Flash Memory

In this study, polycrystalline silicon (poly-Si) is applied to silicon-oxide-nitride-oxide-silicon (SONOS) flash memory as a channel material and the physical and electrical characteristics are analyzed. The results show that the surface roughness of silicon nitride as charge trapping layer (CTL) is enlarged with the number of interface traps and the data retention properties are deteriorated in the device with underlying poly-Si channel which can be serious problem in gate-last 3D NAND flash memory architecture. To improve the memory performance, high pressure deuterium (D2) annealing is suggested as a low-temperature process and the program window and threshold voltage shift in data retention mode is compared before and after the D2 annealing. The suggested curing is found to be effective in improving the device reliability.

Rules of hierarchical melt and coordinate bond to design crystallization in doped phase change materials

While alloy design has practically shown an efficient strategy to mediate two seemingly conflicted performances of writing speed and data retention in phase-change memory, the detailed kinetic pathway of alloy-tuned crystallization is still unclear. Here, we propose hierarchical melt and coordinate bond strategies to solve them, where the former stabilizes a medium-range crystal-like region and the latter provides a rule to stabilize amorphous. The Er0.52Sb2Te3 compound we designed achieves writing speed of 3.2 ns and ten-year data retention of 161 °C. We provide a direct atomic-level evidence that two neighbor Er atoms stabilize a medium-range crystal-like region, acting as a precursor to accelerate crystallization; meanwhile, the stabilized amorphous originates from the formation of coordinate bonds by sharing lone-pair electrons of chalcogenide atoms with the empty 5d orbitals of Er atoms. The two rules pave the way for the development of storage-class memory with comprehensive performance to achieve next technological node.