A new layout design system for multichip modules (MCMs) consisting of three components is described. It includes a k-way partitioning approach, an algorithm for pin assignment, and a placement package. For partitioning, we propose an analytical technique combined with a problem-specific multi-way ratio cut method. This method considers fixed module-level pad positions and assigns the cells to regularly arranged chips on the MCM substrate. In the subsequent pin assignment step the chip-level pads resulting from cut nets are positioned on the chip borders. Pin assignment is performed by an efficient algorithm, which profits from the cell coordinates generated by the analytical technique. Global and final placement for each chip is computed by the state-of-the-art placement tools GORDIANL and DOMINO. For the first time, results for MCM layout designs of benchmark circuits with up to 100,000 cells are presented. They show a small number of required chip-level pads, which is the most restricted resource in MCM design, and short total wire lengths.
