A 110-nm CMOS 0.7-V Input Transient-Enhanced Digital Low-Dropout Regulator With 99.98% Current Efficiency at 80-mA Load

2015 ◽  
Vol 23 (7) ◽  
pp. 1281-1286 ◽  
Author(s):  
Tak-Jun Oh ◽  
In-Chul Hwang
2015 ◽  
Vol 764-765 ◽  
pp. 471-475 ◽  
Author(s):  
Wei Bin Yang ◽  
Shao Jyun Xie ◽  
Han Hsien Wang

The new digital control loop of the low-dropout regulator (LDO) is presented. It is composed of coarse tracking circuit and fine tracking circuit, and no external output capacitor is required to stabilize the control loop. The proposed method makes the quiescent current lower than conventional analog LDOs. The operational amplifier of the conventional LDO fails to operate at 0.7V, and the developed digital LDO in 0.18um CMOS achieved the 0.7V input voltage and 0.5V output voltage with 99.99% current efficiency and 2.6-μA quiescent current at 20mA load current. Therefore, the proposed DLDO is suitable for low power applications.


2011 ◽  
Vol E94-C (6) ◽  
pp. 938-944 ◽  
Author(s):  
Yasuyuki OKUMA ◽  
Koichi ISHIDA ◽  
Yoshikatsu RYU ◽  
Xin ZHANG ◽  
Po-Hung CHEN ◽  
...  

2021 ◽  
Vol 36 (2) ◽  
pp. 2044-2058 ◽  
Author(s):  
Muhammad Abrar Akram ◽  
Kyung-Sung Kim ◽  
Sohmyung Ha ◽  
In-Chul Hwang

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