We present a new approach to the power modeling of functional modules, referred to as
the backward propagated capacitance model, for estimating the power consumption of
VLSI systems that are described at the register transfer level (RTL). To construct the
proposed model, we investigate the effect of the module's internal capacitance on power
consumption at the gate level. Then, we store the effect in a library in terms of the
equivalent input capacitance of the module. The equivalent input capacitance is used to
compute the module's power without the lower level elaboration during the power
analysis of the RTL system. In the experiment using benchmark functional modules, the
proposed model showed the absolute modeling error of 1.39% on average. For the
benchmark RTL systems, the proposed model exhibited the absolute error of 3.04% in
power estimation on average. If signal characteristics deviate from the modeling
condition, the modeling error may increase. Experimental results show that the
modeling accuracy can be improved greatly by using a simple compensation method.
Fault Modeling of Combinational and Sequential Circuits at Register Transfer Level
