Multistage Machining Process Design and Optimization Using Error Equivalence Method

In design of a multistage machining process, process tolerance allocation at each stage and design of process layouts, in particular, the fixture layouts, should be optimized considering dimensional tolerance stackup or variation propagation. When multiple error sources contribute to the tolerance stackup, the dimensionality of the design space could be large and design solution may not be unique. One strategy is to prioritize the allocation of tolerances to different error sources at each stage through proper selection of cost functions. Considering the fact that the cost function selection can be very subjective and the knowledge regarding cost structures is very limited, we propose a hierarchical process design method using error equivalence concept to aggregate multiple error sources together. The main idea is to allocate tolerances to the aggregated error sources at each stage and then further distribute the tolerance to individual error sources through cost analysis. The advantage is two-fold: (1) limiting the impact of cost function selection within individual stages to avoid overhaul of process design caused by subtle change in cost functions, and (2) enabling the optimization of fixture layouts to reduce the overall tolerance stackup due to multiple error sources. To reduce computational load in optimizing process layouts, a computer experiment model is developed to explore a large number of process design alternatives. The robustness of the optimal tolerance is evaluated through sensitivity analysis, which provides guidance for process design. We illustrate the error-equivalence-based process design method by a multistage machining process. The results have shown that the proposed method could significantly reduce the design space and increase the design efficiency.