Customized illumination aperture filter design for through-pitch focus latitude enhancement of deep submicron contact hole printing

2002 ◽  
Vol 1 (3) ◽  
pp. 296 ◽  
Author(s):  
Shuo-Yen Chou
Keyword(s):  
Filter Design ◽  
Deep Submicron ◽  
Aperture Filter

Towards optimum multilayer filter design

1991 ◽  
Vol 138 (4) ◽  
pp. 241 ◽  
Author(s):  
T.C. Chen
Keyword(s):  
Filter Design

Digital Multiple Notch Filter Design with Nelder-Mead Simplex Method

2017 ◽  
Vol E100.A (1) ◽  
pp. 259-265
Author(s):  
Qiusheng WANG ◽  
Xiaolan GU ◽  
Yingyi LIU ◽  
Haiwen YUAN
Keyword(s):  
Simplex Method ◽  
Filter Design ◽  
Notch Filter

New efficient filter design for a heat sink

2011 ◽  
pp. 581-585 ◽  
Author(s):  
J. Kulanayagam ◽  
J.H. Hagmann ◽  
K.F. Hoffmann ◽  
S. Dickmann
Keyword(s):  
Heat Sink ◽  
Filter Design

dC/dV and CV Characterization of Gate Resistance Defects in eDRAM Circuits

2013 ◽  
Author(s):  
Sweta Pendyala ◽  
Dave Albert ◽  
Katherine Hawkins ◽  
Michael Tenney
Keyword(s):  
Deep Submicron ◽  
Work Flow ◽  
Localization Technique ◽  
Characterization Techniques ◽  
Capacitance Voltage ◽  
Gate Resistance

Abstract Resistive gate defects are unusual and difficult to detect with conventional techniques [1] especially on advanced devices manufactured with deep submicron SOI technologies. An advanced localization technique such as Scanning Capacitance Imaging is essential for localizing these defects, which can be followed by DC probing, dC/dV, CV (Capacitance-Voltage) measurements to completely characterize the defect. This paper presents a case study demonstrating this work flow of characterization techniques.

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