NOVEL VOLTAGE-MODE CASCADABLE ALL-PASS SECTIONS EMPLOYING GROUNDED PASSIVE COMPONENTS

2013 ◽  
Vol 22 (01) ◽  
pp. 1250065 ◽  
Author(s):  
SUDHANSHU MAHESHWARI ◽  
JITENDRA MOHAN ◽  
DURG SINGH CHAUHAN

This paper presents two new first-order voltage-mode (VM) cascadable all-pass (AP) sections, employing two differential voltage current conveyors (DVCCs) and three grounded passive components. Both circuits possess high input and low output impedance, which makes them easily cascadable. Non-ideality aspects and parasitic effects are also studied. As an application, a quadrature oscillator is designed using the proposed circuit. The proposed circuits are verified through PSPICE simulations using 0.5 μm CMOS parameters.

2014 ◽  
Vol 23 (06) ◽  
pp. 1450077 ◽  
Author(s):  
JITENDRA MOHAN ◽  
SUDHANSHU MAHESHWARI

To extend the existing knowledge on first-order voltage-mode all-pass filters, this paper presents two novel first-order voltage-mode all-pass sections, each employing single fully differential second-generation current conveyor (FDCCII) being used as the newly obtained fully differential voltage conveyor (FDVC), a resistor and a grounded capacitor. Both the proposed circuits possess high-input and low-output impedance feature, which makes the proposed circuits ideal for voltage-mode systems. Non-ideal study along with simulation results is given for validation.


2013 ◽  
Vol 2013 ◽  
pp. 1-9 ◽  
Author(s):  
Sudhanshu Maheshwari ◽  
Bhartendu Chaturvedi

This paper presents some additional high input low output impedance analog networks realized using a recently introduced single Dual-X Current Conveyor with buffered output. The new circuits encompass several all-pass sections of first- and second-order. The voltage-mode proposals benefit from high input impedance and low output impedance. Nonideality and sensitivity analysis is also performed. The circuit performances are depicted through PSPICE simulations, which show good agreement with theory.


2007 ◽  
Vol 16 (04) ◽  
pp. 567-576 ◽  
Author(s):  
SUDHANSHU MAHESHWARI

This paper presents a new first order current mode all-pass section (CM-APS) with a grounded capacitor and employing a modified current controlled conveyor. The new circuit with high output impedance is ideal for current-mode cascading and is tunable through an external bias current. The proposed circuit is unique due to its features, not exhibited by any of the available works on the topic. An application of the circuit in realizing a quadrature oscillator is also given. The theory is validated through PSPICE simulations using real device transistors.


2007 ◽  
Vol 2007 ◽  
pp. 1-5 ◽  
Author(s):  
Sudhanshu Maheshwari

This paper presents two new first-order voltage-mode all-pass filters using a single-current differencing buffered amplifier and four passive components. Each circuit is compatible to a current-controlled current differencing buffered amplifier with only two passive elements, thus resulting in two more circuits, which employ a capacitor, a resistor, and an active element, thus using a minimum of active and passive component counts. The proposed circuits possess low output impedance, and hence can be easily cascaded for voltage-mode systems. PSPICE simulation results are given to confirm the theory.


Author(s):  
Jiun-Wei Horng ◽  
Chun-Yang Tsai ◽  
Te-Chi Chen ◽  
Chang-Ming Wu

Background: Three high input impedances voltage-mode first-order filters are presented. Methods: The first proposed circuit uses one multi-output second-generation current conveyor, two resistors and one grounded capacitor. The second proposed circuit uses two second-generation current conveyors, three resistors and one grounded capacitor. The third proposed circuit uses one multi-output second-generation current conveyor, one resistor and two grounded capacitors. Results: First-order lowpass and allpass filters can be simultaneously obtained in the first proposed circuit. First-order lowpass, highpass and allpass filters can be simultaneously obtained in the second proposed circuit. The third proposed circuit can realize first-order allpass filter. Conclusion: All the proposed circuits have the advantages of high input impedances and using only grounded capacitors.


2011 ◽  
Vol 20 (02) ◽  
pp. 329-347 ◽  
Author(s):  
SUDHANSHU MAHESHWARI ◽  
JITENDRA MOHAN ◽  
DURG SINGH CHAUHAN

In this paper, twelve new circuit configurations for realization of first-order, second-order voltage-mode all-pass and notch filters with high input impedance and low output impedance are presented. The proposed circuit configurations use two plus type DDCCs, and two impedances. The circuits use one grounded capacitor and two grounded resistors for realizing first-order all-pass filters, and two grounded capacitors and two resistors for realizing second-order all-pass/notch filters. High input impedance and low output impedance of the configuration enable the circuits to be cascaded without additional buffers. As an application, a quadrature oscillator is realized. The theoretical results are verified with PSPICE simulations using 0.5 μm CMOS parameters.


2013 ◽  
Vol 2013 ◽  
pp. 1-8 ◽  
Author(s):  
Bhartendu Chaturvedi ◽  
Sudhanshu Maheshwari

The paper presents a new quadrature oscillator of third order which can provide four quadrature current outputs and two quadrature voltage outputs. The new circuit employs three differential voltage current conveyors and six passive components, most of which are in grounded form. Circuit operation at high frequencies is verified along with nonideality and parasitic study. The circuit enhancement for generation of four phase clock waveforms is also given. The proposed circuit is a novel addition to the oscillator family.


2003 ◽  
Vol 26 (3) ◽  
pp. 167-170 ◽  
Author(s):  
R. Saraswat ◽  
K. Pal ◽  
S. Rana

Three circuits each realizing second-order all-pass/notch filter transfer functions are reported. All circuits use grounded capacitors and are suitable for IC implementation. These circuits offer the advantages of high input impedance and low output impedance and are superior to all earlier realisations.


2014 ◽  
Vol 68 (12) ◽  
pp. 1239-1246 ◽  
Author(s):  
Wilas Ninsraku ◽  
Dalibor Biolek ◽  
Winai Jaikla ◽  
Surapong Siripongdee ◽  
Peerawut Suwanjan

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