scholarly journals Compiler-guided register reliability improvement against soft errors

Author(s):  
Jun Yan ◽  
Wei Zhang
2009 ◽  
Vol 129 (10) ◽  
pp. 949-956
Author(s):  
Kohji Ajiki ◽  
Hiroaki Morimoto ◽  
Fumiyuki Shimokawa ◽  
Shinya Sakai ◽  
Kazuomi Sasaki ◽  
...  

Author(s):  
Michael Hertl ◽  
Diane Weidmann ◽  
Alex Ngai

Abstract A new approach to reliability improvement and failure analysis on ICs is introduced, involving a specifically developed tool for Topography and Deformation Measurement (TDM) under thermal stress conditions. Applications are presented including delamination risk or bad solderability assessment on BGAs during JEDEC type reflow cycles.


2018 ◽  
Author(s):  
Oberon Dixon-Luinenburg ◽  
Jordan Fine

Abstract In this paper, we demonstrate a novel nanoprobing approach to establish cause-and-effect relationships between voltage stress and end-of-life performance loss and failure in SRAM cells. A Hyperion II Atomic Force nanoProber was used to examine degradation for five 6T cells on an Intel 14 nm processor. Ten minutes of asymmetrically applied stress at VDD=2 V was used to simulate a ‘0’ bit state held for a long period, subjecting each pullup and pulldown to either VDS or VGS stress. Resultant degradation caused read and hold margins to be reduced by 20% and 5% respectively for the ‘1’ state and 5% and 2% respectively for the ‘0’ state. ION was also reduced, for pulldown and pullup respectively, by 4.5% and 5.4% following VGS stress and 2.6% and 33.8% following VDS stress. Negative read margin failures, soft errors, and read time failures all become more prevalent with these aging symptoms whereas write stability is improved. This new approach enables highly specific root cause analysis and failure prediction for end-of-life in functional on-product SRAM.


1978 ◽  
Author(s):  
J. L. Easterday ◽  
J. E. Drennan ◽  
L. R. Albrechtson ◽  
W. Gordon

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