Reliable low-overhead arbiter-based physical unclonable functions for resource-constrained IoT devices

Author(s):  
Sha Tao ◽  
Elena Dubrova
2020 ◽  
pp. 714-721
Author(s):  
Khalid T. Mursi ◽  
◽  
Yu Zhuang

Security is critically important for Internet-of-Things, but existing cryptographic protocols are not lightweight enough for resource-constrained IoT devices. Implementable with simplistic circuits and operable with shallow power, physical unclonable functions (PUFs) leverage small but unavoidable physical variations of the circuit to produce unique responses for individual PUF instances, rendering themselves good candidates as security primitives for IoT devices. Component-differentially-challenged XOR PUFs (CDC XPUFs) are among the PUFs which were shown to be highly secure to machine learning modeling attacks. However, no study of implementation and experimentation has been carried out. In this paper, we report our implementations of CDC XPUFs on FPGAs and experimental studies of the essential properties of CDC XPUFs.


Author(s):  
Prateek Chhikara ◽  
Rajkumar Tekchandani ◽  
Neeraj Kumar ◽  
Mohammad S. Obaidat

Sensors ◽  
2021 ◽  
Vol 21 (5) ◽  
pp. 1598
Author(s):  
Sigurd Frej Joel Jørgensen Ankergård ◽  
Edlira Dushku ◽  
Nicola Dragoni

The Internet of Things (IoT) ecosystem comprises billions of heterogeneous Internet-connected devices which are revolutionizing many domains, such as healthcare, transportation, smart cities, to mention only a few. Along with the unprecedented new opportunities, the IoT revolution is creating an enormous attack surface for potential sophisticated cyber attacks. In this context, Remote Attestation (RA) has gained wide interest as an important security technique to remotely detect adversarial presence and assure the legitimate state of an IoT device. While many RA approaches proposed in the literature make different assumptions regarding the architecture of IoT devices and adversary capabilities, most typical RA schemes rely on minimal Root of Trust by leveraging hardware that guarantees code and memory isolation. However, the presence of a specialized hardware is not always a realistic assumption, for instance, in the context of legacy IoT devices and resource-constrained IoT devices. In this paper, we survey and analyze existing software-based RA schemes (i.e., RA schemes not relying on specialized hardware components) through the lens of IoT. In particular, we provide a comprehensive overview of their design characteristics and security capabilities, analyzing their advantages and disadvantages. Finally, we discuss the opportunities that these RA schemes bring in attesting legacy and resource-constrained IoT devices, along with open research issues.


2021 ◽  
Vol 17 (3) ◽  
pp. 1-24
Author(s):  
Ioannis Tsiokanos ◽  
Jack Miskelly ◽  
Chongyan Gu ◽  
Maire O’neill ◽  
Georgios Karakonstantis

In recent years, physical unclonable functions (PUFs) have gained a lot of attention as mechanisms for hardware-rooted device authentication. While the majority of the previously proposed PUFs derive entropy using dedicated circuitry, software PUFs achieve this from existing circuitry in a system. Such software-derived designs are highly desirable for low-power embedded systems as they require no hardware overhead. However, these software PUFs induce considerable processing overheads that hinder their adoption in resource-constrained devices. In this article, we propose DTA-PUF, a novel, software PUF design that exploits the instruction- and data-dependent dynamic timing behaviour of pipelined cores to provide a reliable challenge-response mechanism without requiring any extra hardware. DTA-PUF accepts sequences of instructions as an input challenge and produces an output response based on the manifested timing errors under specific over-clocked settings. To lower the required processing effort, we systematically select instruction sequences that maximise error-rate. The application to a post-layout pipelined floating-point unit, which is implemented in 45 nm process technology, demonstrates the effectiveness and practicability of our PUF design. Finally, DTA-PUF requires up to 50× fewer instructions than existing software processor PUF designs, limiting processing costs and resulting in up to 26% power savings.


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