Charge trapping at 4H-SiC/dielectric interfaces in 4H-SiC MOS capacitors has been investigated using constant capacitance deep level transient spectroscopy (CCDLTS). The experiments were focused on further understanding of the following aspects related to 4H-SiC/SiO2 interfaces: (i) Origin of near interface oxide traps (NITs), (ii) Effect of interfacial impurity/passivation methods and (iii) Characterization of near-interface oxide traps for different SiC wafer orientations. For the (0001) Si-face 4H-SiC/ SiO2 interface, two types of NITs are typically detected by CCDLTS, named ‘O1’ and ‘O2’ traps with emission activation energies of about 0.15±0.05 eV and 0.39±0.1 eV respectively below the 4H-SiC conduction band. Based on comparison with previous ab initio calculations, the physical identities of these defects have been suggested to be carbon dimers substituted for O dimers (‘O1’) and interstitial silicon atoms (‘O2’) in the near interfacial SiO2 respectively. In this work, it is shown for the first time that such traps are not observed for 4H-SiC/ Al2O3 interfaces, proving that these traps are inherent to the near-interfacial SiO2. In addition, the summary of CCDLTS results for Si-face with different interface trap passivation methods are included in this study. Finally, a comparison is presented for NO annealed (0001) Si-face, (11-20) a-face and (000-1) C-face interfaces that highlight the difference of CCDLTS signatures for the different crystal faces.