A Simple Route to Ultra Long SiC Nanowires

2007 ◽  
Vol 7 (2) ◽  
pp. 580-583 ◽  
Author(s):  
K. F. Cai ◽  
Q. Lei ◽  
A. X. Zhang

SiC nanowires are prepared by pyrolysis of hexamethyldisilane (HMDS), at 1200 °C in a flowing Ar atmosphere. The length of the nanowires is in millimeter scale. Transmission electron microscopy observations indicate that the diameters of the SiC nanowires are in the range of about 8 to 120 nm, and that most of the nanowires have numerous stacking faults. The formation mechanism of the nanowires is proposed.

2016 ◽  
Vol 858 ◽  
pp. 105-108 ◽  
Author(s):  
Yu Yang ◽  
Jian Qiu Guo ◽  
Ouloide Goue ◽  
Balaji Raghothamachar ◽  
Michael Dudley ◽  
...  

Synchrotron white beam X-ray topography studies carried out on 4H-SiC wafers characterized by locally varying doping concentrations reveals the presence of overlapping Shockley stacking faults generated from residual surface scratches in regions of higher doping concentrations after the wafers have been subjected to heat treatment. The fault generation process is driven by the fact that in regions of higher doping concentrations, a faulted crystal containing double Shockley faults is more stable than perfect 4H–SiC crystal at the high temperatures (>1000 °C) that the wafers are subject to during heat treatment. We have developed a model for the formation mechanism of the rhombus shaped stacking faults, and experimentally verified it by characterizing the configuration of the bounding partials of the stacking faults on both surfaces. Using high resolution transmission electron microscopy, we have verified that the enclosed stacking fault is a double Shockley type.


Further experiments by transmission electron microscopy on thin sections of stainless steel deformed by small amounts have enabled extended dislocations to be observed directly. The arrangement and motion of whole and partial dislocations have been followed in detail. Many of the dislocations are found to have piled up against grain boundaries. Other observations include the formation of wide stacking faults, the interaction of dislocations with twin boundaries, and the formation of dislocations at thin edges of the foils. An estimate is made of the stacking-fault energy from a consideration of the stresses present, and the properties of the dislocations are found to be in agreement with those expected from a metal of low stacking-fault energy.


2014 ◽  
Vol 806 ◽  
pp. 39-42
Author(s):  
Paola Lagonegro ◽  
Matteo Bosi ◽  
Giovanni Attolini ◽  
Marco Negri ◽  
Sathish Chander Dhanabalan ◽  
...  

We report on the synthesis of SiC nanowires (NWs) using iron as catalyst. The NWs were grown on silicon substrate by vapour-liquid-solid (VLS) mechanism with propane and silane as precursors, both 3% diluted in hydrogen, and hydrogen as carrier gas. The growth temperature was 1250°C, to reach the eutectic values of the Si-Fe alloy and to permit the VLS mechanism. The as-grown SiC nanowires were characterized by scanning and transmission electron microscopy. The nanowires are from 30 to 100 nm in diameter and several μm in length, with <111> growth direction.


2008 ◽  
Vol 600-603 ◽  
pp. 67-70 ◽  
Author(s):  
Alkyoni Mantzari ◽  
Frédéric Mercier ◽  
Maher Soueidan ◽  
Didier Chaussende ◽  
Gabriel Ferro ◽  
...  

The aim of the present work is to study the structural properties of 3C-SiC which is grown on (0001) 6H-SiC and on (100) 3C-SiC (Hoya) seeds using the Continuous Feed Physical Vapor Transport (CF-PVT) method. Transmission Electron Microscopy (TEM) observations confirm that the overgrown layer is of the 3C-SiC polytype. In the case of the 6H-SiC substrate, microtwins (MTs), stacking faults (SFs) and dislocations (D) are observed at the substrate-overgrown interface with most of the dislocations annihilating within the first few µm from the interface. In the case of 3C-SiC crystals grown on 3C seeds, repeated SFs are formed locally and also coherent (111) twins of 3C-SiC are frequently observed near the surface. The SF density is reduced at the uppermost part of the grown material.


2008 ◽  
Vol 8 (7) ◽  
pp. 3504-3510 ◽  
Author(s):  
K. L. Wallis ◽  
M. Wieligor ◽  
T. W. Zerda ◽  
S. Stelmakh ◽  
S. Gierlotka ◽  
...  

SiC nanowires were obtained by a reaction between vapor silicon and multiwall carbon nanotubes, CNT, in vacuum at 1200 °C. Raman and IR spectrometry, X-ray diffraction and high resolution transmission electron microscopy, HRTEM, were used to characterize properties of SiC nanowires. Morphology and chemical composition of the nanowires was similar for all samples, but concentration of structural defects varied and depended on the origin of CNT. Stacking faults were characterized by HRTEM and Raman spectroscopy, and both techniques provided complementary results. Raman microscopy allowed studying structural defects inside individual nanowires. A thin layer of amorphous silicon carbide was detected on the surface of nanowires.


2008 ◽  
Vol 41-42 ◽  
pp. 15-19 ◽  
Author(s):  
Y.Q. Wu ◽  
Han Huang ◽  
Jin Zou

In this work, deformation of monocrystalline silicon (Si) under nanoscratching was investigated using transmission electron microscopy (TEM). The results indicated that no fracture occurred during nanoscratching with loads ranging from 1 to 6 mN. The damaged regions induced by nanoscratching included an amorphous Si region and a damaged crystalline Si region. Detailed TEM analyses revealed that at the lowest load of 1 mN no dislocation was observed in the damaged crystalline region, and only stacking faults were observed at the boundary between the damaged crystalline Si and amorphous Si. Dislocations started to nucleate along (111) planes and penetrated into the bulk Si when the normal load was increased to 2 mN and above. Defects perpendicular to the scratched surface were initiated when the load was greater than 4 mN. The density of dislocations also increased rapidly with the increase of the applied load.


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