scholarly journals Akats-korronteen mugaketa MMC bihurgailudun VSC-HVDC sistemetan

Author(s):  
Araitz Iturregi ◽  
Agurtzane Etxegarai ◽  
D. Marene Larruskain ◽  
Pablo Eguia ◽  
Oihane Abarrategui

Goi-tentsioko korronte zuzeneko (ingelesez, High Voltage Direct Current HVDC) garraio-sistemak gero eta garrantzitsuagoak dira sistema elektrikoan, onura ekonomiko eta teknikoak direla eta. Hala ere, akatsen bat gertatzen denean, korrontea eteteak oraindik ere erronka izaten jarraitzen du HVDC sareetan. Desiragarriak ez diren korronteak eteteko, korronte zuzeneko etengailuak erabil daitezke, baina horien gaitasuna mugatua da. Egoera hala izanik, akats-korronteen mugagailuak (ingelesez, Fault Current Limiter FCL) dira proposamenik egokiena akats-korronteak maneiagarriagoak diren balioetara txikitzeko; hartara, sistema elektrikoaren garraio-ahalmena handitu daiteke, ekipamendua aldatu beharrik gabe. Sarean aldez aurretik legokeen ekipamendua gai izango litzateke korronte berriak kudeatzeko eta sistema era eraginkorrean babesteko FCLen erabilpenaz. Artikulu honetan, FCL tresnen ezaugarri orokorrak eta sailkapena aurkezten dira. Ondoren, egoera solidoko FCLa erabili da maila anizkoitzeko bihurgailudun (ingelesez, Modular Multilevel Converter MMC) VSC-HVDC (ingelesez, Voltage Source Converter) sistema batean, eta horren jokaera azaltzen da simulazio bidez.

2015 ◽  
Vol 2015 ◽  
pp. 1-11 ◽  
Author(s):  
Fei Chang ◽  
Zhongping Yang ◽  
Yi Wang ◽  
Fei Lin ◽  
Shihui Liu

The modular multilevel converter (MMC) is an emerging voltage source converter topology suitable for multiterminal high voltage direct current transmission based on modular multilevel converter (MMC-MTDC). This paper presents fault characteristics of MMC-MTDC including submodule fault, DC line fault, and fault ride-through of wind farm integration. Meanwhile, the corresponding protection strategies are proposed. The correctness and effectiveness of the control strategies are verified by establishing a three-terminal MMC-MTDC system under the PSCAD/EMTDC electromagnetic transient simulation environment.


Materials ◽  
2018 ◽  
Vol 12 (1) ◽  
pp. 26 ◽  
Author(s):  
Lei Chen ◽  
Huiwen He ◽  
Guocheng Li ◽  
Hongkun Chen ◽  
Lei Wang ◽  
...  

In this paper, a hybrid high voltage direct current transmission system containing a line commutated converter and a voltage source converter is developed. To enhance the robustness of the hybrid transmission system against direct current short-circuit faults, resistive-type superconducting fault current limiters are applied, and the effectiveness of this approach is assessed. Related mathematical models are built, and the theoretical functions of the proposed approach are expounded. According to the transient simulations in MATLAB software, the results demonstrate that: (i) The superconducting fault current limiter at the voltage source converter station enables to very efficiently mitigate the fault transients, and owns an enhanced current-limiting ability for handling the short-line faults. (ii) The superconducting fault current limiter at the line commutated converter station is able to mildly limit the fault current and alleviate the voltage drop, and its working performance has a low sensitivity to the fault location. At the end of the study, a brief scheme design of the resistive-type superconducting fault current limiters is achieved. In conclusion, the application feasibility of the proposed approach is well confirmed.


2019 ◽  
Vol 9 (8) ◽  
pp. 1661 ◽  
Author(s):  
Kaipei Liu ◽  
Qing Huai ◽  
Liang Qin ◽  
Shu Zhu ◽  
Xiaobing Liao ◽  
...  

The main weakness of the half-bridge modular multilevel converter-based high-voltage direct current (MMC-HVDC) system lies in its immature solution to extremely high current under direct current (DC) line fault. The development of the direct current circuit breaker (DCCB) remains constrained in terms of interruption capacity and operation speed. Therefore, it is essential to limit fault current in the MMC-HVDC system. An enhanced fault current-limiting circuit (EFCLC) is proposed on the basis of fault current study to restrict fault current under DC pole-to-pole fault. Specifically, the EFCLC consists of fault current-limiting inductance L F C L and energy dissipation resistance R F C L in parallel with surge arrestor. L F C L reduces the fault current rising speed, together with arm inductance and smoothing reactor. However, in contrast to arm inductance and smoothing reactor, L F C L will be bypassed via parallel-connected thyristors after blocking converter to prevent the effect on fault interruption speed. R F C L shares the stress on energy absorption device (metal oxide arrester) to facilitate fault interruption. The DCCB requirement in interruption capacity and breaking speed can be satisfied effortlessly through the EFCLC. The working principle and parameter determination of the EFCLC are presented in detail, and its effectiveness is verified by simulation in RT-LAB and MATLAB software platforms.


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