Removable External Seeding for Solid phase Epitaxy of Amorphous Silicon on Glass Substrates

1991 ◽  
Vol 237 ◽  
Author(s):  
Atsutoshi Doi ◽  
Takanori Tsuda ◽  
Masa-ICHI Kumikawa ◽  
Yoshiyuki Nakamizo ◽  
Kazuyuki Ueda

ABSTRACTA new method for obtaining a planar silicon film on glass substrates (SOG) with controlled crystal orientation has been introduced. This technique uses solid phase epitaxy (SPE) with external seed to fabricate the orientation-controlled SOG structure. Heat treatment of amorphous SOG substrate in contact with mesa striped Si seed crystal was performed at 540°C for 16 hours to form the SPE layer. The planar surface of the SOG structure is due to the most important feature of the present technique-the separation of the seed from the substrate after SPE.

1999 ◽  
Vol 587 ◽  
Author(s):  
Rosaria A. Puglisi ◽  
Hiroshi Tanabe ◽  
Claudine M. Chen ◽  
Harry A. Atwater ◽  
Emanuele Rimini

AbstractWe investigated the formation of large-grain polycrystalline silicon films on glass substrates for application in low-cost thin film crystalline silicon solar cells. Since use of glass substrates constrains process temperatures, our approach to form large-grain polycrystalline silicon templates is selective nucleation and solid phase epitaxy (SNSPE). In this process, selective crystallization of an initially amorphous silicon film, at lithographically predetermined sites, enables grain sizes larger than those observed via random crystallization. Selective heterogeneous nucleation centers were created on undoped, 75 nm thick, amorphous silicon films, by masked implantation of Ni islands, followed by annealing at temperatures below 600 °. At this temperature, the Ni precipitates into NiSi2 particles that catalyze the transition from the amorphous to the crystalline Si phase. Seeded crystallization begins at the metal islands and continues via lateral solid phase epitaxy (SPE), thus obtaining crystallized regions of several tens of square microns in one hour. We have studied the dependence of the crystallization rate on the Ni-implanted dose in the seed, in the 5×1015/cm3 - 1016/cm3range. The large grained polycrystalline Si films were then used as a substrate for molecular beam epitaxy (MBE) depositions of 1 [.proportional]m thick Si layers. Transmission electron microscopy (TEM) analysis showed a strong correlation between the substrate morphology and the deposited layer. The layer presented a large grain morphology, with sizes of about 4 [.proportional]m.


2010 ◽  
Vol 1245 ◽  
Author(s):  
Agata Sakic ◽  
Yann Civale ◽  
Lis K. Nanver ◽  
Cleber Biasotto ◽  
Vladimir Jovanovic

AbstractSilicon-on-insulator (SOI) regions have been grown on lithographically predetermined positions by Al-mediated Solid-Phase Epitaxy (SPE) of amorphous silicon (α-Si). A controllable Si lateral overgrowth is induced from windows formed in silicon dioxide (SiO2) to the crystalline Si substrate. The resulting hundred of-nanometer large areas of high-quality monocrystalline SOI are formed at the temperatures that can be as low as 400 °C. The as-obtained SOI regions were found to take on the same crystal orientation as the (100) Si substrate and have the ability to merge seamlessly over the oxide.


2010 ◽  
Vol 108 (4) ◽  
pp. 044901 ◽  
Author(s):  
D. J. Pyke ◽  
J. C. McCallum ◽  
B. C. Johnson

1993 ◽  
Vol 321 ◽  
Author(s):  
J. Yi ◽  
R. Wallace ◽  
N. Sridhar ◽  
D. D. L. Chung ◽  
W. A. Anderson

ABSTRACTThin film hydrogenated Amorphous silicon (a-Si:H) was deposited on Molybdenum (Mo) substrates by d.c. glow discharge. We investigated the a-Si:H crystallization using four anneal techniques; nitrogen atmosphere furnace, vacuum, rapid thermal anneal (RTA), and excimer laser anneal. Anneal temperature ranged from 100 to 1200 °C. Excimer laser energy per pulse ranged from 90 to 340 M.J. Transmission electron Microscopy (TEM) revealed microstructure of crystallized Si film with grain size over 0.5 μm. X-ray diffraction (XRD) and Raman spectroscopy were employed to determine the degree of crystallization. The a-Si:H started to crystallize at temperatures over 600 °C. An 850 °C anneal reduced film resistivity to 10s (ω-cm) for intrinsic and 1 (ω-cm) for n-type. Coplanar type thin film transistors (TFT) with gate channel length of 25 μm and width of 220 μm were fabricated with various insulating layers; if sputtered SiO2, Si3N4, BaTiO3, MgO, and evaporated SiO. The first two exhibited the least leakage current. The as-grown intrinsic a-Si:H field effect mobility was around 0.03 (cmVV.s) and delay time was 5×10−7 s. The solid phase crystallized silicon film exhibited high leakage current. The delay time of an excimer laser anneal treated TFT was reduced to 2.5×10−7 s. Crystallized Si film mobility was improved to 15 (cm2 /V.s).


Sign in / Sign up

Export Citation Format

Share Document