scholarly journals Energy Performance Testing of Asetek's RackCDU System at NREL's High Performance Computing Data Center

2014 ◽  
Author(s):  
D. Sickinger ◽  
O. Van Geet ◽  
C. Ravenscroft
Author(s):  
J. E. Lozano-Rizk ◽  
J. I. Nieto-Hipolito ◽  
R. Rivera-Rodriguez ◽  
M. A. Cosio-Leon ◽  
M. Vazquez-Briseno ◽  
...  

2021 ◽  
Vol 2069 (1) ◽  
pp. 012153
Author(s):  
Rania Labib

Abstract Architects often investigate the daylighting performance of hundreds of design solutions and configurations to ensure an energy-efficient solution for their designs. To shorten the time required for daylighting simulations, architects usually reduce the number of variables or parameters of the building and facade design. This practice usually results in the elimination of design variables that could contribute to an energy-optimized design configuration. Therefore, recent research has focused on incorporating machine learning algorithms that require the execution of only a relatively small subset of the simulations to predict the daylighting and energy performance of buildings. Although machine learning has been shown to be accurate, it still becomes a time-consuming process due to the time required to execute a set of simulations to be used as training and validation data. Furthermore, to save time, designers often decide to use a small simulation subset, which leads to a poorly designed machine learning algorithm that produces inaccurate results. Therefore, this study aims to introduce an automated framework that utilizes high performance computing (HPC) to execute the simulations necessary for the machine learning algorithm while saving time and effort. High performance computing facilitates the execution of thousands of tasks simultaneously for a time-efficient simulation process, therefore allowing designers to increase the size of the simulation’s subset. Pairing high performance computing with machine learning allows for accurate and nearly instantaneous building performance predictions.


2013 ◽  
Vol 756-759 ◽  
pp. 2825-2828
Author(s):  
Xue Chun Wang ◽  
Quan Lu Zheng

Parallel computing is in parallel computer system for parallel processing of data and information, often also known as the high performance computing or super computing. The content of parallel computing were introduced, the realization of parallel computing and MPI parallel programming under Linux environment were described. The parallel algorithm based on divide and conquer method to solve rectangle placemen problem was designed and implemented with two processors. Finally, Through the performance testing and comparison, we verified the efficiency of parallel computing.


Author(s):  
Joshua Gess ◽  
Sushil H. Bhavnani ◽  
R. Wayne Johnson

The meteoric growth of social networking involvement along with cost-effective cloud based computing business models are just two reasons why data center power consumption is growing at an alarming rate. Dwindling global energy resources mandate that these data centers be more efficient, especially as our dependence and demand upon them grow. As the data center demand grows, components will be designed with reductions in volume and increases in processor speeds, resulting in increases in heat fluxes which two-phase liquid immersion techniques offer the potential of dissipating. The proposed experimental facility seeks to illustrate how these demands can be met through the integration of a small form factor line replaceable cartridge which contains heated elements meant to simulate components within a high performance computing unit. The facility also consists of thermal support equipment used for heat extraction and rejection to ambient much like one would find in a liquid cooled data center, such as a chiller, fluid pumps, etc. One way to effectively characterize the efficiency of a thermal design technique is to quantify the thermal resistance, and subsequently minimize it as much as possible. Incredibly low module level thermal resistances have been achieved, on the order of 0.13 K/W under pool conditions and as little as 0.10 K/W when flow is introduced within the electronics housing. Trends of the cartridge’s thermal resistance have been explored as exterior chilled water temperatures are varied, over several surface enhancements along with the variation of external chilled water and internal dielectric fluid flow rates. As has been noted by several authors in their study of immersion cooled modules, a condensation limit has been found and trends upon it associated with varying the previously mentioned parameters have also been documented. The effect upon thermal performance of diverting the flow over the primary heating elements in various ways has been explored through the use of Particle Image Velocimetry (PIV). These techniques have been used to illustrate how a new dielectric fluid flow distribution design resulted in increased mass flow rate over critical components within the cartridge.


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