scholarly journals Multiplexed Quantum Random Number Generation

Quantum ◽  
2019 ◽  
Vol 3 ◽  
pp. 141 ◽  
Author(s):  
Ben Haylock ◽  
Daniel Peace ◽  
Francesco Lenzini ◽  
Christian Weedbrook ◽  
Mirko Lobino

Fast secure random number generation is essential for high-speed encrypted communication, and is the backbone of information security. Generation of truly random numbers depends on the intrinsic randomness of the process used and is usually limited by electronic bandwidth and signal processing data rates. Here we use a multiplexing scheme to create a fast quantum random number generator structurally tailored to encryption for distributed computing, and high bit-rate data transfer. We use vacuum fluctuations measured by seven homodyne detectors as quantum randomness sources, multiplexed using a single integrated optical device. We obtain a real-time random number generation rate of 3.08 Gbit/s, from only 27.5 MHz of sampled detector bandwidth. Furthermore, we take advantage of the multiplexed nature of our system to demonstrate an unseeded strong extractor with a generation rate of 26 Mbit/s.

SPIN ◽  
2019 ◽  
Vol 10 (01) ◽  
pp. 2050003 ◽  
Author(s):  
Iman Alibeigi ◽  
Abdolah Amirany ◽  
Ramin Rajaei ◽  
Mahmoud Tabandeh ◽  
Saeed Bagheri Shouraki

Generation of random numbers is one of the most important steps in cryptographic algorithms. High endurance, high performance and low energy consumption are the attractive features offered by the Magnetic Tunnel Junction (MTJ) devices. Therefore, they have been considered as one of the promising candidates for next-generation digital integrated circuits. In this paper, a new circuit design for true random number generation using MTJs is proposed. Our proposed circuit offers a high speed, low power and a truly random number generation. In our design, we employed two MTJs that are configured in special states. Generated random bit at the output of the proposed circuit is returned to the write circuit to be written in the relevant cell for the next random generation. In a random bitstream, all bits must have the same chance of being “0”or “1”. We have proposed a new XOR-based method in this paper to resolve this issue in multiple random generators that produce truly random numbers with a different number of ones and zeros in the output stream. The simulation results using a 45[Formula: see text]nm CMOS technology with a special model of MTJ validated the advantages offered by the proposed circuit.


2021 ◽  
Vol 11 (8) ◽  
pp. 3330
Author(s):  
Pietro Nannipieri ◽  
Stefano Di Matteo ◽  
Luca Baldanzi ◽  
Luca Crocetti ◽  
Jacopo Belli ◽  
...  

Random numbers are widely employed in cryptography and security applications. If the generation process is weak, the whole chain of security can be compromised: these weaknesses could be exploited by an attacker to retrieve the information, breaking even the most robust implementation of a cipher. Due to their intrinsic close relationship with analogue parameters of the circuit, True Random Number Generators are usually tailored on specific silicon technology and are not easily scalable on programmable hardware, without affecting their entropy. On the other hand, programmable hardware and programmable System on Chip are gaining large adoption rate, also in security critical application, where high quality random number generation is mandatory. The work presented herein describes the design and the validation of a digital True Random Number Generator for cryptographically secure applications on Field Programmable Gate Array. After a preliminary study of literature and standards specifying requirements for random number generation, the design flow is illustrated, from specifications definition to the synthesis phase. Several solutions have been studied to assess their performances on a Field Programmable Gate Array device, with the aim to select the highest performance architecture. The proposed designs have been tested and validated, employing official test suites released by NIST standardization body, assessing the independence from the place and route and the randomness degree of the generated output. An architecture derived from the Fibonacci-Galois Ring Oscillator has been selected and synthesized on Intel Stratix IV, supporting throughput up to 400 Mbps. The achieved entropy in the best configuration is greater than 0.995.


2017 ◽  
Vol 28 (06) ◽  
pp. 1750078 ◽  
Author(s):  
Kamalika Bhattacharjee ◽  
Dipanjyoti Paul ◽  
Sukanta Das

This paper investigates the potentiality of pseudo-random number generation of a 3-neighborhood 3-state cellular automaton (CA) under periodic boundary condition. Theoretical and empirical tests are performed on the numbers, generated by the CA, to observe the quality of it as pseudo-random number generator (PRNG). We analyze the strength and weakness of the proposed PRNG and conclude that the selected CA is a good random number generator.


Author(s):  
R. Chase Harrison ◽  
Benjamin K. Rhea ◽  
Frank T. Werner ◽  
Robert N. Dean

The desirable properties exhibited in some nonlinear dynamical systems have many potential uses. These properties include sensitivity to initial conditions, wide bandwidth, and long-term aperiodicity, which lend themselves to applications such as random number generation, communication and audio ranging systems. Chaotic systems can be realized in electronics by using inexpensive and readily available parts. Many of these systems have been verified in electronics using nonpermanent prototyping at very low frequencies; however, this restricts the range of potential applications. In particular, random number generation (RNG) benefits from an increase in operation frequency, since it is proportional to the amount of bits that can be produced per second. This work looks specifically at the nonlinear element in the chaotic system and evaluates its frequency limitations in electronics. In practice, many of nonlinearities are difficult to implement in high speed electronics. In addition to this restriction, the use of complex feedback paths and large inductors prevents the miniaturization that is desirable for implementing chaotic circuits in other electronic systems. By carefully analyzing the fundamental dynamics that govern the chaotic system, these problems can be addressed. Presented in this work is the design and realization of a high frequency chaotic oscillator that exhibits complex and rich dynamics while using a compact footprint and low power consumption.


Author(s):  
Michael A. Wayne ◽  
Gleb Akselrod ◽  
Evan R. Jeffrey ◽  
Paul G. Kwiat

2010 ◽  
Vol 18 (12) ◽  
pp. 13029 ◽  
Author(s):  
Martin Fürst ◽  
Henning Weier ◽  
Sebastian Nauerth ◽  
Davide G. Marangon ◽  
Christian Kurtsiefer ◽  
...  

2018 ◽  
Vol 120 (1) ◽  
Author(s):  
Yang Liu ◽  
Xiao Yuan ◽  
Ming-Han Li ◽  
Weijun Zhang ◽  
Qi Zhao ◽  
...  

2008 ◽  
Vol 2008 ◽  
pp. 1-8
Author(s):  
Simone Fiori

In a previous work (S. Fiori, 2006), we proposed a random number generator based on a tunable non-linear neural system, whose learning rule is designed on the basis of a cardinal equation from statistics and whose implementation is based on look-up tables (LUTs). The aim of the present manuscript is to improve the above-mentioned random number generation method by changing the learning principle, while retaining the efficient LUT-based implementation. The new method proposed here proves easier to implement and relaxes some previous limitations.


2019 ◽  
Vol 4 (2) ◽  
pp. 025013 ◽  
Author(s):  
Bingjie Xu ◽  
Ziyang Chen ◽  
Zhengyu Li ◽  
Jie Yang ◽  
Qi Su ◽  
...  

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