scholarly journals Pattern recognition on FPGA for aerospace applications

2021 ◽  
Vol 10 (12) ◽  
pp. e83101219181
Author(s):  
Francisco de Assis Tavares Ferreira da Silva ◽  
Magno Prudêncio de Almeida Filho ◽  
Antonio Macilio Pereira de Lucena ◽  
Alexandre Guirland Nowosad

This paper presents a low power near real-time pattern recognition technique based on Mathematical Morphology-MM implemented on FPGA (Field Programmable Gate Array). The key to the success of this approach concerns the advantages of machine learning paradigm applied to the translation invariant template-matching operators from MM. The paper shows that compositions of simple elementary operators from Mathematical Morphology based on ELUTs (Elementary Look-Up Tables) are very suitable to embed in FPGA hardware. The paper also shows the development techniques regarding all mathematical modeling for computer simulation and system generating models applied for hardware implementation using FPGA chip. In general, image processing on FPGAs requires low-level description of desired operations through Hardware Description Language-HDL, which uses high complexity to describe image operations at pixel level. However, this work presents a reconfiguring pattern recognition device implemented directly in FPGA from mathematical modeling simulation under Matlab/Simulink/System Generator environment. This strategy has reduced the hardware development complexity. The device will be useful mainly when applied on remote sensing tasks for aerospace missions using passive or active sensors.

2011 ◽  
Vol 20 (02) ◽  
pp. 263-282 ◽  
Author(s):  
DAVIDE ANGUITA ◽  
LUCA CARLINO ◽  
ALESSANDRO GHIO ◽  
SANDRO RIDELLA

We describe in this work a Core Generator for Pattern Recognition tasks. This tool is able to generate, according to user requirements, the hardware description of a digital architecture, which implements a Support Vector Machine, one of the current state-of-the-art algorithms for Pattern Recognition. The output of the Core Generator consists of a high-level language hardware core description, suitable to be mapped on a reconfigurable device, like a Field Programmable Gate Array (FPGA). As an example of the use of our tool, we compare different solutions, by targeting several reconfigurable devices, and implement the recognition part of a machine vision system for automotive applications.


2015 ◽  
Vol 773-774 ◽  
pp. 761-765
Author(s):  
Nur Atiqah Adon ◽  
Fahanahani Mahmud ◽  
Mohamad Hairol Jabbar ◽  
Norliza Othman

In past few decades, most of the modern electrophysiological concepts and methods were developed by the computational technique extensively to compute the cardiac action potential in nerve cells. Thus, tissue models consisting of a large number of single cell models cause a problem in the amount of computation required to obtain meaningful results from simulations. One of the solutions to this problem is by implementing the simulation through hardware modeling using a Field Programmable Gate Array (FPGA). Here, a research on developing a real-time simulation tool responsible for reentrant excitations in a ring of cardiac tissue based on the FitzHugh-Nagumo (FHN) model has been carried out by using a Xilinx Virtex-6 XC6VLX240T ML605 development board FPGA. In order to invest some of the time savings for creating the FPGA prototype, rapid prototyping method introduced by MathWorks which are MATLAB Simulink and its HDL Coder toolbox have been used to automate the algorithm design process by converting Simulink blocks into Hardware Description Language (HDL) code for the FPGA using a fixed-point data type in discrete-time framework. In this paper, the method and the optimization of the HDL design through the MATLAB Simulink have been discussed and the FPGA hardware performance in terms of speed, area and power consumption has also been analyzed.


Author(s):  
Vitaly Kober ◽  
Victor H. ◽  
J. Angel ◽  
Josue Alvarez-Borrego

2014 ◽  
pp. 27-33
Author(s):  
Mounir Bouhedda ◽  
Mokhtar Attari

The aim of this paper is to introduce a new architecture using Artificial Neural Networks (ANN) in designing a 6-bit nonlinear Analog to Digital Converter (ADC). A study was conducted to synthesise an optimal ANN in view to FPGA (Field Programmable Gate Array) implementation using Very High-speed Integrated Circuit Hardware Description Language (VHDL). Simulation and tests results are carried out to show the efficiency of the designed ANN.


Author(s):  
J. Francisco Vargas ◽  
Miguel A. Ferrer

Biometric offers potential for automatic personal identification and verification, differently from other means for personal verification; biometric means are not based on the possession of anything (as cards) or the knowledge of some information (as passwords). There is considerable interest in biometric authentication based on automatic signature verification (ASV) systems because ASV has demonstrated to be superior to many other biometric authentication techniques e.g. finger prints or retinal patterns, which are reliable but much more intrusive and expensive. An ASV system is a system capable of efficiently addressing the task of make a decision whether a signature is genuine or forger. Numerous pattern recognition methods have been applied to signature verification. Among the methods that have been proposed for pattern recognition on ASV, two broad categories can be identified: memory-based and parameter-based methods as a neural network. The Major approaches to ASV systems are the template matching approach, spectrum approach, spectrum analysis approach, neural networks approach, cognitive approach and fractal approach. The proposed article reviews ASV techniques corresponding with approaches that have so far been proposed in the literature. An attempt is made to describe important techniques especially those involving ANNs and assess their performance based on published literature. The paper also discusses possible future areas for research using ASV.


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