scholarly journals A Specialized System-on-Chip Based Distance Protection for Distribution Grids with Inverter Interfaced Distributed Generation

2020 ◽  
Vol 8 ◽  
Author(s):  
Peng Li ◽  
Wei Xi ◽  
Xianggen Yin ◽  
Xiangjun Zeng ◽  
Licheng Li ◽  
...  
Keyword(s):  
Low Voltage ◽  
System On Chip ◽  
Positive Sequence ◽  
Distance Protection ◽  
Distribution Grid ◽  
Fault Resistance ◽  
Chip Technology ◽  
Simulation Results ◽  
On Chip ◽  
Specialized System

Legacy protection schemes face new challenges as Inverter Interfaced Distribution Generation (IIDG) significantly changes the transient fault response of the distribution grid. The performance of the protection near the IIDG side is adversely affected by Low Voltage Ride Through (LVRT) and the negative sequence current suppression control characteristics of the IIDG. The operational characteristics of the protection are very different from those of the legacy protection schemes used in the distribution grid. Traditional overcurrent protection schemes cannot meet the requirements of selectivity and sensitivity. This paper analyses the influence of the IIDG on the protection schemes used in the distribution grid. Based on the positive sequence voltage polarization impedance criterion this study proposes a polarizing impedance criterion based on the fault component of positive sequence voltage, which can adaptively follow the fault resistance variation to satisfy the requirements of grid operation. The simulation results show that: (a) the proposed criterion is immune to the adverse effects of the transient characteristics of the IIDG; and, (b) it can adaptively follow the change of fault resistance making it suitable for application in short distribution lines. Using specialized System-on-Chip technology, a new distance protection device has been developed and tested on an industrial site. Simulation results and field tests showed that the new distance protection meets the requirements of the distribution grid with IIDGs.

Multiprocessor transport surveillance video system based on "system on chip" technology

2020 ◽  
Author(s):  
Ш.С. Фахми ◽  
Н.В. Шаталова ◽  
В.В. Вислогузов ◽  
Е.В. Костикова
Keyword(s):  
System On Chip ◽  
Reference Points ◽  
Surveillance Video ◽  
Video Information ◽  
Chip Technology ◽  
Intelligent Video Surveillance System ◽  
Speed Up ◽  
Algorithmic Analysis ◽  
Computational Procedures ◽  
On Chip

В данной работе предлагаются математический аппарат и архитектура многопроцессорной транспортной системы на кристалле (МПТСнК). Выполнена программно-аппаратная реализация интеллектуальной системы видеонаблюдения на базе технологии «система на кристалле» и с использованием аппаратного ускорителя известного метода формирования опорных векторов. Архитектура включает в себя сложно-функциональные блоки анализа видеоинформации на базе параллельных алгоритмов нахождения опорных точек изображений и множества элементарных процессоров для выполнения сложных вычислительных процедур алгоритмов анализа с использованием средств проектирования на базе реконфигурируемой системы на кристалле, позволяющей оценить количество аппаратных ресурсов. Предлагаемая архитектура МПТСнК позволяет ускорить обработку и анализ видеоинформации при решении задач обнаружения и распознавания чрезвычайных ситуаций и подозрительных поведений. In this paper, we propose the mathematical apparatus and architecture of a multiprocessor transport system on a chip (MPTSoC). Software and hardware implementation of an intelligent video surveillance system based on the "system on chip" technology and using a hardware accelerator of the well-known method of forming reference vectors. The architecture includes complex functional blocks for analyzing video information based on parallel algorithms for finding image reference points and a set of elementary processors for performing complex computational procedures for algorithmic analysis. using design tools based on a reconfigurable system on chip that allows you to estimate the amount of hardware resources. The proposed MPTSoC architecture makes it possible to speed up the processing and analysis of video information when solving problems of detecting and recognizing emergencies and suspicious behaviors

scholarly journals Recent Advances in Hearing Aid Technology-A Review

2021 ◽  
Vol 9 (VI) ◽  
pp. 3427-3429
Author(s):  
Animita Das
Keyword(s):  
Hearing Aids ◽  
Hearing Aid ◽  
Cost Effective ◽  
System On Chip ◽  
Audio Signals ◽  
Technology System ◽  
The People ◽  
Chip Technology ◽  
On Chip ◽  
System 1

Hearing aids are electroacoustic gadgets commonly worn in or behind the ear and are intended to enhance the speech Nowadays hearing aids support various application unlike the traditional ones such that it can act like headphones streaming audio signals from internet-enabled devices connected wirelessly via Bluetooth. This paper aims to review the various advancements in the hearing aid technology. System on chip technology of the microcontroller have been used in various studies to develop and design an effective hearing assistant device and help the people with hearing impairment to lead a normal life. Ten articles have been reviewed for the study and it can be concluded that IoT is the future for an efficient, cost effective hearing assistive system [1]

scholarly journals A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

2016 ◽  
Vol 11 (01) ◽  
pp. C01059-C01059 ◽  
Author(s):  
R. Bartoldus ◽  
R. Claus ◽  
N. Garelli ◽  
R.T. Herbst ◽  
M. Huffer ◽  
...  
Keyword(s):  
System On Chip ◽  
Readout System ◽  
Chip Technology ◽  
On Chip

H.264/AVC high definition intra coding implementation on multiprocessor system on chip technology architecture

2015 ◽  
Author(s):  
Nidhameddine Belhadj ◽  
Nejmeddine Bahri ◽  
Zied Marrakchi ◽  
Mohamed Ali Ben Ayed ◽  
Nouri Masmoudi ◽  
...  
Keyword(s):  
System On Chip ◽  
Multiprocessor System ◽  
High Definition ◽  
Intra Coding ◽  
Chip Technology ◽  
On Chip

scholarly journals Low Complexity System on Chip Design to Acquire Signals from MOS Gas Sensor Applications

Sensors ◽  
2021 ◽  
Vol 21 (19) ◽  
pp. 6552
Author(s):  
Juan B. Talens ◽  
Jose Pelegri-Sebastia ◽  
Maria Jose Canet
Keyword(s):  
Gas Sensor ◽  
Low Voltage ◽  
Low Cost ◽  
Low Complexity ◽  
System On Chip ◽  
Working Environment ◽  
Sigma Delta ◽  
Sensor Applications ◽  
Analog Signals ◽  
On Chip

Analog signals from gas sensors are used to recognize all types of VOC (Volatile Organic Compound) substances, such as toxic gases, tobacco or ethanol. The processes to recognize these substances include acquisition, treatment and machine learning for classification, which can all be efficiently implemented on a Field Programmable Gate Array (FPGA) aided by Low-Voltage Differential Signaling (LVDS). This article proposes a low-cost 11-bit effective number of bits (ENOB) sigma-delta Analog to Digital Converter (ADC), with an SNR of 75.97 dB and an SFDR of 72.28 dB, whose output is presented on screen in real time, thanks to the use of a Linux System on Chip (SoC) system that enables parallelism, high-level programming and provides a working environment for the scientific treatment of gas sensor signals. The high frequency achieved by the implemented ADC allows for multiplexing the capture of several analog signals with an optimal resolution. Additionally, several ADCs can be implemented in the same FPGA so several analog signals can be digitalized in parallel.

scholarly journals Design of AMBA AXI4 protocol for System-on-Chip communication

2012 ◽  
pp. 38-42
Author(s):  
Shaila S Math ◽  
Manjula R B
Keyword(s):  
System On Chip ◽  
Hardware Description Language ◽  
Test Cases ◽  
Description Language ◽  
Write Response ◽  
Hardware Description ◽  
Simulation Results ◽  
On Chip ◽  
Ip Blocks ◽  
Bus Architecture

Advanced microcontroller bus architecture (AMBA) protocol family provides metric-driven verification of protocol compliance, enabling comprehensive testing of interface intellectual property (IP) blocks and system-on-chip (SoC) designs. The AMBA advanced extensible interface 4 (AXI4) update to AMBA AXI3 includes the following: support for burst lengths up to 256 beats, updated write response requirements, removal of locked transactions and AXI4 also includes information on the interoperability of components. AMBA AXI4 protocol system supports 16 masters and 16 slaves interfacing. This paper presents a work aimed to design the AMBA AXI4 protocol modeled in Verilog hardware description language (HDL) and simulation results for read and write operation of data and address are shown in Verilog compiler simulator (VCS) tool. The operating frequency is set to 100MHz. Two test cases are run to perform multiple read and multiple write operations. To perform single read operation module takes 160ns and for single write operation it takes 565ns.

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