scholarly journals Design and Implementation of a Single-Stage PFC Active-Clamp Flyback Converter with Dual Transformers

Electronics ◽  
2021 ◽  
Vol 10 (21) ◽  
pp. 2588
Author(s):  
Sen-Tung Wu ◽  
Yu-Ting Cheng

This paper proposes an AC/DC single-stage structure by integrating a boost topology and an active clamp flyback (ACF) circuit with power-factor-correction (PFC) function. The PFC function can be achieved by controlling a boost PFC topology operated in the discontinuous conduction mode. With the coordination of active clamping components, a resonant technique is obtained and zero-voltage-switching (ZVS) can be achieved. The proposed converter is combined with the advantages of: (1) compared with two-stage circuit, a single stage circuit decreases the component of the main circuit and reduces the complexity of the control circuit; (2) a boost topology with PFC function operated in discontinuous conduction mode can be accomplished without adding any current detecting technique or detecting input signal; (3) by using the inductor from the PFC stage, ZVS function can be achieved without any additional inductor; (4) the increment of switching frequency facilitates the optimization of power density; (5) the conducting loss at the secondary side can be reduced by adding the synchronous rectification; (6) in this proposed scheme, the dual transformers with series-parallel connection are utilized, the current at the secondary side can be shared for lowering the conduction loss of the synchronous transistors. Finally, a prototype converter with AC 110 V input and DC 19 V/6.32 A (120 W) output under 300 kHz switching frequency is implemented. The efficiency of the proposed converter reaches 88.20% and 0.984 power factor in full load condition.

Author(s):  
Sathiyamoorthy S ◽  
Gopinath M

Power Factor Correction (PFC) has become one of the most active research areas in the field of power electronics due to the surplus power required for various industrial applications around the world. In this work, a novel SEPIC converter with the Tapped Inductor model operating in Discontinuous Conduction Mode (TI-SEPIC- DCM) is proposed for PFC. The proposed TI-SEPIC-DCM improves the voltage gain through voltage multiplier cell and charge pump circuit. The voltage multiplier cell also helps in attaining the Zero-Voltage Switching (ZVS) and Zero-Current Switching (ZCS), which results in higher switching frequency and size reduction. Moreover, a third order harmonic reduction control loop has been proposed for better harmonic mitigation. The proposed work has been simulated in MATLAB and the results are obtained to validate the significance of the proposed TI-SEPIC- DCM with near unity power factor and reduced harmonics.


2015 ◽  
Vol 30 (8) ◽  
pp. 4349-4364 ◽  
Author(s):  
Carlos Gabriel Bianchin ◽  
Roger Gules ◽  
Alceu Andre Badin ◽  
Eduardo Felix Ribeiro Romaneli

Sign in / Sign up

Export Citation Format

Share Document