scholarly journals Investigating the Shielding Effect of Pulse Transformer Operation in Isolated Gate Drivers for SiC MOSFETs

Energies ◽  
2021 ◽  
Vol 14 (13) ◽  
pp. 3866
Author(s):  
Loreine Makki ◽  
Marc Anthony Mannah ◽  
Christophe Batard ◽  
Nicolas Ginot ◽  
Julien Weckbrodt

Wide-bandgap technology evolution compels the advancement of efficient pulse-width gate-driver devices. Integrated enhanced gate-driver planar transformers are a source of electromagnetic disturbances due to inter-winding capacitances, which serve as a route to common-mode(CM) currents. This paper will simulate, via ANSYS Q3D Extractor, the unforeseen parasitic effects of a pulse planar transformer integrated in a SiC MOSFET gate-driver card. Moreover, the pulse transformer will be ameliorated by adding distinctive shielding layers aiming to suppress CM noise effects and endure high dv/dt occurrences intending to validate experimental tests. The correlation between stray capacitance and dv/dt immunity results after shielding insertion will be reported.

2019 ◽  
Vol 139 (3) ◽  
pp. 339-347 ◽  
Author(s):  
Shotaro Takahashi ◽  
Satoshi Ogasawara ◽  
Masatsugu Takemoto ◽  
Koji Orikawa ◽  
Michio Tamate

Energies ◽  
2020 ◽  
Vol 13 (7) ◽  
pp. 1595
Author(s):  
Qiyu Li ◽  
Hongwei Zhou ◽  
Jiansong Zhang ◽  
Shengdun Zhao ◽  
Jingfeng Lu

The output LC filter of a photovoltaic (PV) string three-level grid-tied inverter that connects the filter capacitor neutral point to dc-link capacitor neutral point can reduce the common-mode (CM) current injected to the grid by letting the CM current circulate within the inverter. However, the internal CM current may resonate because of the existence of the resonant frequency of the internal CM LC circuit. Compared with the traditional continuous pulse-width modulation (CPWM), the resonance can be worse if discontinuous pulse-width modulation (DPWM) is applied, for the zero sequence quantity of DPWM contains more harmonics than that of CPWM. In this paper, a virtual negative resistor based common mode current resonance suppression method for a three-level grid-tied inverter is proposed to overcome the CM current resonance problem in DPWM application. Different positions of the virtual negative resistor in the equivalent CM circuit with different feedback variables are analyzed theoretically. The virtual negative resistor connected in series with the inductor in the equivalent CM circuit is selected to damp the CM current resonance for simplification and damping performance. Different from the implementation in CPWM where a pair of small voltage vectors exist and are used to adjust the CM voltage directly, the proposed method for DPWM application is implemented indirectly by adding the CM adjustment quantity to differential-mode (DM) control quantity with appropriate coefficients. Depending on the sector of DM control quantity in the α β reference frame, the coefficients are calculated using one of three specific voltage vectors. Experimental results are given to demonstrate the effectiveness of theoretical analyses and the proposed method.


Author(s):  
Mohammad Jafar Zandzadeh ◽  
Mohsen Saniei ◽  
Reza Kianinezhad

Purpose This paper aims to present a modified space vector pulse width modulation (SVPWM) technique for six-phase induction motor drive based on common-mode voltage (CMV) and current losses which are two important issues affecting drive system behavior and quality. Design/methodology/approach It is shown that the presence of z-component currents and the presence of CMV in six-phase drive system are two major limiting factors in space vector selection. The behavior of several space vector selections in a two-level inverter considering minimum CMV and z-components is investigated. Then, the space vectors in a three-level inverter is analyzed and tried to explore an SVM technique with better behavior. Findings The analyses show that all the problems cannot be solved in a six-phase drive system with two-level inverter despite having 64 space vectors; this study tried to overcome the limitations by exploring space vectors in a three-level inverter. Originality/value The proposed pulse width modulation (PWM) strategy leads to minimum current distortion and undesired current components with zero CMV and modest torque ripple.


Author(s):  
Dipen Narendra Dalal ◽  
Nicklas Christensen ◽  
Asger Bjorn Jorgensen ◽  
Simon Dyhr Sonderskov ◽  
Szymon Beczkowski ◽  
...  
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