A BP Decoding Algorithm Based on Nodes Residual for LDPC Codes and its Hardware Implementation

2011 ◽  
Vol 128-129 ◽  
pp. 7-10
Author(s):  
Zhong Xun Wang ◽  
Xing Cheng Wang ◽  
Fang Qiang Zhu
Keyword(s):  
Hardware Implementation ◽  
Belief Propagation ◽  
Dynamic Scheduling ◽  
Ldpc Codes ◽  
Ldpc Code ◽  
Low Complexity ◽  
Decoding Algorithm ◽  
Fast Decoding ◽  
Good For

We researched BP decoding algorithm based on variable-to-check information residual for LDPC code (VC-RBP) in this paper. It is a dynamic scheduling belief propagation using residuals, and has some advantages，such as fast decoding, good performance, and low complexity. It is similar to residual belief propagation (RBP),but has some difference in computing the residual message. This paper further optimized the new algorithm on DSP of TMS320dm6446, and it is good for hardware implementation.

scholarly journals Design of Quasi-Cyclic Low Density Parity Check Decoder Using Optimized Min-Sum Algorithm

2018 ◽  
Vol 7 (03) ◽  
pp. 23781-23784
Author(s):  
Rajarshini Mishra
Keyword(s):  
Variance Estimation ◽  
Cyclic Codes ◽  
Ldpc Codes ◽  
Ldpc Code ◽  
Low Complexity ◽  
Low Density ◽  
Parity Check ◽  
Decoding Algorithm ◽  
Low Density Parity Check ◽  
Xilinx Fpga

Low-density parity-check (LDPC) have been shown to have good error correcting performance approaching Shannon’s limit. Good error correcting performance enables efficient and reliable communication. However, a LDPC code decoding algorithm needs to be executed efficiently to meet cost , time, power and bandwidth requirements of target applications. Quasi-cyclic low-density parity-check (QC-LDPC) codes are an important subclass of LDPC codes that are known as one of the most effective error controlling methods. Quasi cyclic codes are known to possess some degree of regularity. Many important communication standards such as DVB-S2 and 802.16e use these codes. The proposed Optimized Min-Sum decoding algorithm performs very close to the Sum-Product decoding while preserving the main features of the Min-Sum decoding, that is low complexity and independence with respect to noise variance estimation errors.Proposed decoder is well matched for VLSI implementation and will be implemented on Xilinx FPGA family

A Novel LLR-BP Algorithm for LDPC Codes Based on Taylor Series and Least Squares

2013 ◽  
Vol 462-463 ◽  
pp. 193-197
Author(s):  
Xing Ru Zhang ◽  
Jian Ping Li ◽  
Chao Shi Cai
Keyword(s):  
Least Squares ◽  
Taylor Series ◽  
Belief Propagation ◽  
Signal To Noise Ratio ◽  
Ldpc Codes ◽  
Low Complexity ◽  
Significant Loss ◽  
Bp Algorithm ◽  
High Signal ◽  
Decoding Algorithm

An effective log-likelihood-ratio-based belief propagation (LLR-BP) algorithm is proposed. It can reduce computational complexity of decoding algorithm for Low Density Parity Check (LDPC) codes. By using the Taylor series and least squares, high order multiplication based on the hyperbolic tangent (tanh) rule is converted to a first-order multiplication and addition after simplification. Moreover, all the logarithmic and exponential operations disappear without significant loss of the decoding performance. The simulation results show that the performance of the proposed scheme is similar to the general LLR-BP. In particular, we show that the modified algorithm with low complexity can achieve better BER than the other decoding algorithm in high signal-to-noise ratio region.

A BP Decoding Algorithm Based on Nodes Residual for LDPC Codes and Its Hardware Implementation

2012 ◽  
Vol 6 (1) ◽  
pp. 642-645
Author(s):  
Zhongxun Wang ◽  
Xingcheng Wang ◽  
Fangqiang Zhu
Keyword(s):  
Hardware Implementation ◽  
Ldpc Codes ◽  
Decoding Algorithm

The Design of Low Complexity Decoder Based on DVB-S2 LDPC

2012 ◽  
Vol 239-240 ◽  
pp. 911-914
Author(s):  
Zhong Xun Wang ◽  
Shuang Shuang Yin
Keyword(s):  
Hardware Implementation ◽  
Ldpc Code ◽  
Low Complexity ◽  
Bch Code ◽  
Digital Video Broadcasting ◽  
Video Broadcasting ◽  
Uniform Quantization ◽  
Point Representation ◽  
Simulation Results ◽  
Decoder Complexity

An improved codeword construction method was used to encode the BCH code and LDPC code in this paper according to the latest standard defined by digital video broadcasting standard(DVB), and moreover the data overflow problem was solved. The LDPC code was decoded by the reduced complexity Min-Sum decoding algorithm, in which the coefficient was studied. Fixed-point representation and decoder quantization were proposed and simulation results show that 6-bits and 16-bits uniform quantization can make close to the performance of unquantized decoder, which reduces the decoder complexity for hardware implementation.

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