The Design of Low Complexity Decoder Based on DVB-S2 LDPC

2012 ◽  
Vol 239-240 ◽  
pp. 911-914
Author(s):  
Zhong Xun Wang ◽  
Shuang Shuang Yin
Keyword(s):  
Hardware Implementation ◽  
Ldpc Code ◽  
Low Complexity ◽  
Bch Code ◽  
Digital Video Broadcasting ◽  
Video Broadcasting ◽  
Uniform Quantization ◽  
Point Representation ◽  
Simulation Results ◽  
Decoder Complexity

An improved codeword construction method was used to encode the BCH code and LDPC code in this paper according to the latest standard defined by digital video broadcasting standard(DVB), and moreover the data overflow problem was solved. The LDPC code was decoded by the reduced complexity Min-Sum decoding algorithm, in which the coefficient was studied. Fixed-point representation and decoder quantization were proposed and simulation results show that 6-bits and 16-bits uniform quantization can make close to the performance of unquantized decoder, which reduces the decoder complexity for hardware implementation.

A BP Decoding Algorithm Based on Nodes Residual for LDPC Codes and its Hardware Implementation

2011 ◽  
Vol 128-129 ◽  
pp. 7-10
Author(s):  
Zhong Xun Wang ◽  
Xing Cheng Wang ◽  
Fang Qiang Zhu
Keyword(s):  
Hardware Implementation ◽  
Belief Propagation ◽  
Dynamic Scheduling ◽  
Ldpc Codes ◽  
Ldpc Code ◽  
Low Complexity ◽  
Decoding Algorithm ◽  
Fast Decoding ◽  
Good For

We researched BP decoding algorithm based on variable-to-check information residual for LDPC code (VC-RBP) in this paper. It is a dynamic scheduling belief propagation using residuals, and has some advantages，such as fast decoding, good performance, and low complexity. It is similar to residual belief propagation (RBP),but has some difference in computing the residual message. This paper further optimized the new algorithm on DSP of TMS320dm6446, and it is good for hardware implementation.

A Min-Sum Algorithm Suitable for Hardware Implementation Based on LDPC Codes

2011 ◽  
Vol 271-273 ◽  
pp. 458-463
Author(s):  
Rui Ping Chen ◽  
Zhong Xun Wang ◽  
Xin Qiao Yu
Keyword(s):  
Hardware Implementation ◽  
Ldpc Codes ◽  
Low Complexity ◽  
Scaling Factor ◽  
Computation Complexity ◽  
Decoding Complexity ◽  
Decoding Algorithms ◽  
Hardware Resource ◽  
Simulation Results ◽  
Ber Performance

Decoding algorithms with strong practical value not only have good decoding performance, but also have the computation complexity as low as possible. For this purpose, the paper points out the modified min-sum decoding algorithm(M-MSA). On the condition of no increasing in the decoding complexity, it makes the error-correcting performance improved by adding the appropriate scaling factor based on the min-sum algorithm(MSA), and it is very suitable for hardware implementation. Simulation results show that this algorithm has good BER performance, low complexity and low hardware resource utilization, and it would be well applied in the future.

scholarly journals Hardware Implementation and Performance Analysis of Improved Sphere Decoder in Spatially Correlated Massive MIMO Channels

2021 ◽  
Author(s):  
Dimitris Vordonis ◽  
Vassilis Paliouras
Keyword(s):  
Massive Mimo ◽  
Large Scale ◽  
Hardware Implementation ◽  
Multiple Input Multiple Output ◽  
Low Complexity ◽  
Mimo Channels ◽  
Sphere Decoder ◽  
Trade Offs ◽  
Simulation Results ◽  
The Impact

Detection for high-dimensional multiple-input multiple-output (MIMO) and massive MIMO (MMIMO) systems is an active field of research in wireless communications. While most works consider spatially uncorrelated channels, practical MMIMO channels are correlated. This paper investigates the impact of correlation on Sphere Decoder (SD), for both single-user (SU) and multi-user (MU) scenarios. The complexity of SD is mainly determined by the initial radius (IR) method and the number of visited nodes during detection. This paper employs an efficient IR and proposes a new metric constraint in the tree searching algorithm, that significantly decrease the number of visited nodes and render SD feasible for large-scale systems. In addition, an introduced hardware implementation featured with a one-node-per-cycle architecture, minimizes the latency of the detection process. Trade-offs between bit error rate (BER) performance and computational complexity are presented. The trade-offs are achieved by either modifying the backtracking mechanism or limiting the number of radius updates. Simulation results prove that the proposed optimizations are effective for both correlated and uncorrelated channels, regardless of the level of noise. The decoding gain of SD compared to the low-complexity linear detectors (LD) is higher in the presence of correlation than in the uncorrelated case. However, as expected, spatial correlation adversely affects the performance and the complexity of SD. Simulation results reported here also confirm that correlation at the side equipped with more antennas is less detrimental. Hardware implementation aspects are examined for both a Virtex-7 FPGA device and a 28-nm ASIC technology.<br>

scholarly journals Hardware Implementation and Performance Analysis of Improved Sphere Decoder in spatially correlated Massive MIMO channels

2021 ◽  
Author(s):  
Dimitris Vordonis ◽  
Vassilis Paliouras
Keyword(s):  
Massive Mimo ◽  
Large Scale ◽  
Hardware Implementation ◽  
Multiple Input Multiple Output ◽  
Low Complexity ◽  
Mimo Channels ◽  
Sphere Decoder ◽  
Trade Offs ◽  
Simulation Results ◽  
The Impact

<div>Detection for high-dimensional multiple-input multiple-output (MIMO) and Massive MIMO (MMIMO) systems is an active field of research in wireless communications. While most works consider spatially uncorrelated channels, practical MMIMO channels are correlated. This paper investigates the impact of correlation on Sphere Decoder (SD), not only for Single-User (SU) but also for Multi-User (MU) scenarios. The complexity of SD is mainly determined by the Initial Radius (IR) method and the number of visited nodes during detection. This paper proposes both an efficient IR and a new metric constraint in the tree searching algorithm, that significantly decrease the number of visited nodes and render SD feasible for large-scale systems. In addition, a hardware implementation featured with a one-node-per-cycle architecture, minimizes the latency of the detection process. Trade-offs between bit error rate (BER) performance and computational complexity are presented, either modifying the backtracking mechanism or limiting the number of radius updates. Simulation results prove that the proposed optimizations are effective for both correlated and uncorrelated channels, regardless the level of noise. The decoding gain of SD compared to the low-complexity Linear Detectors (LD) is higher in the presence of correlation than in the uncorrelated case. However, as expected, spatial correlation adversely affects the performance and the complexity of SD. Simulation results reported here also confirm that correlation at the side equipped with more antennas is less detrimental. Hardware aspects are examined for both a Virtex-7 FPGA device and a 28-nm ASIC technology.</div>

Study of FCLSD Algorithm Performance Based on LTE System

2012 ◽  
Vol 195-196 ◽  
pp. 96-103
Author(s):  
Ke Wen Liu ◽  
Quan Liu
Keyword(s):  
High Performance ◽  
Hardware Implementation ◽  
Low Complexity ◽  
Detection Algorithm ◽  
Sphere Decoding ◽  
Mimo Detection ◽  
Decoding Algorithm ◽  
Algorithm Performance ◽  
Simulation Results ◽  
Ber Performance

Soft-output complex list sphere decoding algorithm is a low-complexity MIMO detection algorithm and its BER performance approximates that of Maximum-Likelihood. However, it has a problem of not fixed complexity, and which make it very difficult to implement. To resolve this and try best to retain the advantages of the algorithm, a modified algorithmfixed complex list sphere decoding algorithm was proposed. Based on LTE TDD system, this paper studies the performance of the FCLSD algorithm. The simulation results show that: the BER performance of the FCLSD algorithm is close to that of the CLSD algorithm. However, when the number of antennas and modulation order increasing, the FCLSD algorithm is non-constrained of spherical radius and has fixed complexity. In addition, hardware implementation of the FCLSD algorithm could be carried out by parallel processing, thereby greatly reducing the algorithm complexity. So it is a high-performance algorithm of great potential.

scholarly journals Hardware Implementation and Performance Analysis of Improved Sphere Decoder in spatially correlated Massive MIMO channels

2021 ◽  
Author(s):  
Dimitris Vordonis ◽  
Vassilis Paliouras
Keyword(s):  
Massive Mimo ◽  
Large Scale ◽  
Hardware Implementation ◽  
Multiple Input Multiple Output ◽  
Low Complexity ◽  
Mimo Channels ◽  
Sphere Decoder ◽  
Trade Offs ◽  
Simulation Results ◽  
The Impact

<div>Detection for high-dimensional multiple-input multiple-output (MIMO) and Massive MIMO (MMIMO) systems is an active field of research in wireless communications. While most works consider spatially uncorrelated channels, practical MMIMO channels are correlated. This paper investigates the impact of correlation on Sphere Decoder (SD), not only for Single-User (SU) but also for Multi-User (MU) scenarios. The complexity of SD is mainly determined by the Initial Radius (IR) method and the number of visited nodes during detection. This paper proposes both an efficient IR and a new metric constraint in the tree searching algorithm, that significantly decrease the number of visited nodes and render SD feasible for large-scale systems. In addition, a hardware implementation featured with a one-node-per-cycle architecture, minimizes the latency of the detection process. Trade-offs between bit error rate (BER) performance and computational complexity are presented, either modifying the backtracking mechanism or limiting the number of radius updates. Simulation results prove that the proposed optimizations are effective for both correlated and uncorrelated channels, regardless the level of noise. The decoding gain of SD compared to the low-complexity Linear Detectors (LD) is higher in the presence of correlation than in the uncorrelated case. However, as expected, spatial correlation adversely affects the performance and the complexity of SD. Simulation results reported here also confirm that correlation at the side equipped with more antennas is less detrimental. Hardware aspects are examined for both a Virtex-7 FPGA device and a 28-nm ASIC technology.</div>

Quantization Algorithms in Healthcare Information Telematics Using Wireless Interactive Services of Digital Video Broadcasting.

2020 ◽  
Vol 13 ◽  
Author(s):  
Konstantinos Kardaras ◽  
George I. Lambrou ◽  
Dimitrios Koutsouris
Keyword(s):  
Data Compression ◽  
Data Transmission ◽  
Digital Video ◽  
Digital Television ◽  
End User ◽  
Digital Video Broadcasting ◽  
New Era ◽  
Video Broadcasting ◽  
Television Network ◽  
Interactive Services

Background: In the new era of wireless communications new challenges emerge including the provision of various services over the digital television network. In particular, such services become more important when referring to the tele-medical applications through terrestrial Digital Video Broadcasting (DVB). Objective: One of the most significant aspects of video broadcasting is the quality and information content of data. Towards that end several algorithms have been proposed for image processing in order to achieve the most convenient data compression. Methods: Given that medical video and data are highly demanding in terms of resources it is imperative to find methods and algorithms that will facilitate medical data transmission with ordinary infrastructure such as DVB. Results: In the present work we have utilized a quantization algorithm for data compression and we have attempted to transform video signal in such a way that would transmit information and data with a minimum loss in quality and succeed a near maximum End-user approval. Conclusions: Such approaches are proven to be of great significance in emergency handling situations, which also include health care and emergency care applications.

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