Design and Analysis on Symmetric MEMS Inductor

2015 ◽  
Vol 815 ◽  
pp. 364-368
Author(s):  
N. Khalid ◽  
N.I.M. Nor ◽  
W.M.W. Norhaimi ◽  
Zaliman Sauli ◽  
Vithyacharan Retnasamy
Keyword(s):  
Modeling And Simulation ◽  
Mechanical System ◽  
Computer Aided Design ◽  
Micro Electro Mechanical System ◽  
Q Factor ◽  
High Q ◽  
Computer Aided ◽  
Simulation Results ◽  
Conductor Strip ◽  
Aided Design

This paper presents the design and analysis of new proposed topology micro-electro-mechanical system (MEMS) inductor. This new symmetric MEMS inductor is designed to reduce the total length of the conductor strip and hence reduce the resistance of the metal tracks. This results significant increases in the quality (Q) factor of the inductor. In this paper, the MEMS inductor is designed using CoventorWare®, which is powerful software for MEMS computer aided design (CAD), modeling and simulation. Results indicate that new symmetric inductor topology has thehighest Q-factor and it hasbeenimproved bytwo times compared to circular inductor. The analysis revealed that area of the symmetric inductor has reduced by37.5% compared to the circular inductor. Result has proved that the reduction of length of the conductor strip has reduced the resistance of the metal tracks and results in a high Q-factor inductor.

Impact of Pulse Quenching Effect on Sensitive Area at Advanced Technologies

2013 ◽  
Vol 392 ◽  
pp. 693-696
Author(s):  
Wen Tao Xu ◽  
Yang Guo ◽  
Yan Kang Du
Keyword(s):  
Computer Aided Design ◽  
Three Dimensional ◽  
Sensitive Area ◽  
Isolation Technique ◽  
Quenching Effect ◽  
Advanced Technologies ◽  
Computer Aided ◽  
Simulation Results ◽  
Aided Design ◽  
The Impact

The impact of pulse quenching effect on the sensitive area is evaluated by using three-dimensional technology computer-aided design (TCAD) numerical simulation. Simulation results present that the pulse quenching effect could effectively reduce the sensitive area of PMOS transistors. By adopting the off-state gate isolation technique, the sensitive area is further reduced.

scholarly journals Investigation on the Hump Behavior of Gate-Normal Nanowire Tunnel Field-Effect Transistors (NWTFETs)

2020 ◽  
Vol 10 (24) ◽  
pp. 8880
Author(s):  
Min Woo Kang ◽  
Woo Young Choi
Keyword(s):  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Three Dimensional ◽  
Gate Insulator ◽  
Radius Of Curvature ◽  
Computer Aided ◽  
Simulation Results ◽  
Tcad Simulation ◽  
Aided Design

The hump behavior of gate-normal nanowire tunnel field-effect transistors (NWTFETs) is investigated by using a three-dimensional technology computer-aided design (TCAD) simulation. The simulation results show that the hump behavior degrades the subthreshold swing (SS) and on-current (Ion) because the corners and sides of nanowires (NWs) have different surface potentials. The hump behavior can be successfully suppressed by increasing the radius of curvature (R) of NWs and reducing gate insulator thickness (Tins).

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