Low Power Design of near Shannon Limit Coding: Turbo Codes

2012 ◽  
Vol 433-440 ◽  
pp. 7213-7217
Author(s):  
Niladri Pratap Maity ◽  
Reshmi Maity
Keyword(s):  
Low Power ◽  
Turbo Codes ◽  
Channel Coding ◽  
Low Power Design ◽  
Maximum A Posteriori ◽  
A Posteriori ◽  
Turbo Decoder ◽  
Coding Schemes ◽  
Decoder Design ◽  
Log Map

In this paper secure channel coding schemes based on Turbo Codes are suggested and implemented. The design of encoder using Recursive Systematic Code (RSC) with puncturing techniques is presented. Component decoders are implemented by Log-Maximum-a-Posteriori (Log-MAP) algorithm and thereafter implementation of overall turbo decoder is illustrated in detail. Finally we have investigated low power design technique of the turbo decoder design with variable iteration techniques.

scholarly journals Efficient MAP-algorithm implementation on programmable architectures

2003 ◽  
Vol 1 ◽  
pp. 259-263 ◽  
Author(s):  
F. Kienle ◽  
H. Michel ◽  
F. Gilbert ◽  
N. Wehn
Keyword(s):  
Turbo Codes ◽  
Communication Systems ◽  
Building Blocks ◽  
Communication Performance ◽  
Channel Decoding ◽  
Turbo Decoder ◽  
Decoding Algorithms ◽  
Map Algorithm ◽  
Algorithm Implementation ◽  
Log Map

Abstract. Maximum-A-Posteriori (MAP) decoding algorithms are important HW/SW building blocks in advanced communication systems due to their ability to provide soft-output informations which can be efficiently exploited in iterative channel decoding schemes like Turbo-Codes. Multi-standards demand flexible implementations on programmable platforms. In this paper we analyze a quantized turbo-decoder based on a Max-Log-MAP algorithm with Extrinsic Scaling Factor (ESF). Its communication performance approximate to a Turbo-Decoder with a Log-MAP algorithm and is less sensitive to quantization effects. We present Turbo-Decoder implementations on state-of-the-art DSPs and show that only a Max-Log-MAP implementation fulfills a throughput requirement of ~2 Mbit/s. The negligible overhead for the ESF implementation strengthen the use of Max-Log-MAP with ESF implementation on programmable platforms.

scholarly journals Improving the performance of BICM-ID and MLC systems with different FEC codes

2013 ◽  
Vol 11 ◽  
pp. 87-93 ◽  
Author(s):  
T. Arafa ◽  
W. Sauer-Greff ◽  
R. Urbansky
Keyword(s):  
Turbo Codes ◽  
Channel Coding ◽  
Communication Systems ◽  
Forward Error Correction ◽  
Convolutional Codes ◽  
Coded Modulation ◽  
Modulation Formats ◽  
Coding Schemes ◽  
Multilevel Modulation ◽  
Exit Charts

Abstract. In bandwidth limited communication systems, the high data rate transmission with performance close to capacity limits is achieved by applying multilevel modulation schemes in association with powerful forward error correction (FEC) coding, i.e. coded modulation systems. The most important practical approaches to coded modulation systems are multilevel coding with multistage decoding (MLC/MSD) and bit interleaved coded modulation with iterative demapping and decoding (BICM-ID). Multilevel modulation formats such as M-QAM, which can be used as a part of coded modulation systems, have the capability of multilevel protection. Based on this fact, we investigate the methods to improve the performance of BICM-ID using multiple interleavers with different binary channel coding schemes such as convolutional codes, turbo codes and low-density parity-check (LDPC) codes. Moreover, an MLC system with parallel decoding on levels (PDL) at the receiver is considered. In our contribution, we propose to design the individual coding schemes using the extrinsic information transfer (EXIT) charts for individual bit levels in the constellation. Our simulation results show that the BICM-ID systems, taking into account different bit-level protections, can provide an improvement of 0.65 dB, 1.2 dB and 1.5 dB for 256-QAM with turbo, LDPC and convolutional codes, respectively. On the other hand, MLC systems with PDL designed using EXIT charts for individual bit levels can slightly improve the performance and eliminate the error floor compared to the systems with MSD.

scholarly journals Decoding of Turbo Codes in Symmetric Alpha-Stable Noise

2011 ◽  
Vol 2011 ◽  
pp. 1-7 ◽  
Author(s):  
Mohammad Shafieipour ◽  
Heng-Siong Lim ◽  
Teong-Chee Chuah
Keyword(s):  
Turbo Codes ◽  
Impulsive Noise ◽  
Transition Probability ◽  
Closed Form Expression ◽  
A Posteriori ◽  
Form Expression ◽  
Turbo Decoder ◽  
Similar Performance ◽  
Probability Density Function Pdf ◽  
Stable Noise

This paper investigates the decoding of turbo codes in impulsive symmetric α-stable (SαS) noise. Due to the nonexistence of a closed-form expression for the probability density function (pdf) of α-stable processes, numerical-based SαS pdf is used to derive branch transition probability (btp) for the maximum a posteriori turbo decoder. Results show that in Gaussian noise, the turbo decoder achieves similar performance using both the conventional and the proposed btps, but in impulsive channels, the turbo decoder with the proposed btp substantially outperforms the turbo decoder utilizing the conventional btp. Results also confirm that the turbo decoder incorporating the proposed btp outperforms the existing Cauchy-based turbo decoder in non-Cauchy impulsive noise, while the two decoders accomplish similar performance in Cauchy noise.

Performance Analysis of Turbo Codes Over AWGN Channel

2019 ◽  
Vol 19 (1) ◽  
pp. 43-48 ◽  
Author(s):  
Mohanad Abdulhamid ◽  
Mbugua Thairu
Keyword(s):  
Error Correction ◽  
Turbo Codes ◽  
Channel Coding ◽  
Turbo Coding ◽  
The Past ◽  
Coding Schemes ◽  
Awgn Channel ◽  
Correction Technique ◽  
Simple Component ◽  
Tremendous Impact

AbstractTurbo coding is a very powerful error correction technique that has made a tremendous impact on channel coding in the past two decades. It outperforms most known coding schemes by achieving near Shannon limit error correction using simple component codes and large interleavers. This paper investigates the turbo coder in detail. It presents a design and a working model of the error correction technique using Simulink, a companion softwareto MATLAB. Finally, graphical and tabular results are presented to show that the designed turbo coder works as expected.

scholarly journals VHDL Implementation of low power turbo coded OFDM physical layer for wireless communication

2018 ◽  
Vol 7 (4.5) ◽  
pp. 665 ◽  
Author(s):  
Yanita Shrimali ◽  
Janki Ballabh Sharma ◽  
R. S. Meena
Keyword(s):  
Low Power ◽  
High Throughput ◽  
Power Efficiency ◽  
Orthogonal Frequency Division Multiplexing ◽  
High Speed ◽  
Physical Layer ◽  
Turbo Decoder ◽  
Coded Ofdm ◽  
Vhdl Implementation ◽  
Log Map

Orthogonal Frequency Division Multiplexing (OFDM) is exceptionally favored system for rapid information transmission over remote channel. In this paper, VHDL implementation of low power turbo-coded OFDM (TCOFDM) Physical layer architecture is presented. In this architecture a low power memory-less pipelined FFT processor and Log-map turbo encoder/decoders are used to provide high throughput and lower complexity. Log-map turbo decoder provides high speed with good error correction capacity, while FFT/IFFT processor with single delay feedback (SDF) memory less architecture provide improved area and power efficiency. Proposed TCOFDM system is implemented using Xilinx ISE Design suite in the simulation results shows that the proposed scheme is having low power, high speed, high throughput and smaller area in comparison to other schemes.  

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