Cascode Configuration of SiC-BGSIT and Si-MOSFET with Low On-Resistance and High Transconductance

2016 ◽  
Vol 858 ◽  
pp. 1095-1098
Author(s):  
Masayuki Yamamoto ◽  
Yasunori Tanaka ◽  
Tsutomu Yatsuo ◽  
Koji Yano
Keyword(s):  
Switching Speed ◽  
Reverse Transfer ◽  
Switching Device ◽  
Fast Switching ◽  
Static Induction Transistor ◽  
Static Induction ◽  
High Transconductance ◽  
Fast Switching Speed

We investigate a cascode configuration of a normally-on SiC-Buried Gate Static Induction Transistor (SiC-BGSIT) and Si-MOSFET as an alternative switching device of the SiC-MOSFET. It is shown that the transconductance of our cascode device is much higher than that of commercial SiC-MOSFETs while the switching speed is much faster than that of normally-off SiC-BGSITs. The origin of the fast switching speed in this cascode configuration is discussed in terms of a simulated reverse transfer capacitance.

Fast-switching-speed, low-forward-voltage-drop static induction (SI) thyristor

1996 ◽  
Vol 116 (3) ◽  
pp. 107-115 ◽  
Author(s):  
Mitsuhide Maeda ◽  
Takuji Keno ◽  
Yuji Suzuki ◽  
Toshiro Abe
Keyword(s):  
Voltage Drop ◽  
Forward Voltage ◽  
Switching Speed ◽  
Fast Switching ◽  
Forward Voltage Drop ◽  
Static Induction ◽  
Fast Switching Speed

High-Density Memristor-CMOS Ternary Logic Family

2020 ◽  
Author(s):  
Xiaoyuan Wang ◽  
Pengfei Zhou ◽  
Jason Eshraghian ◽  
Chih-Yang Lin ◽  
Herbert Ho-Ching Iu ◽  
...  
Keyword(s):  
Indium Tin Oxide ◽  
Practical Implementation ◽  
Switching Speed ◽  
High Data ◽  
Fast Switching ◽  
Data Density ◽  
Order Of Magnitude ◽  
High Transconductance ◽  
Logic Functions ◽  
Magnitude Improvement

<div>This paper presents the first experimental demonstration</div><div>of a ternary memristor-CMOS logic family. We systematically</div><div>design, simulate and experimentally verify the primitive</div><div>logic functions: the ternary AND, OR and NOT gates. These are then used to build combinational ternary NAND, NOR, XOR and XNOR gates, as well as data handling ternary MAX and MIN gates. Our simulations are performed using a 50-nm process which are verified with in-house fabricated indium-tin-oxide memristors, optimized for fast switching, high transconductance, and low current leakage. We obtain close to an order of magnitude improvement in data density over conventional CMOS logic, and a reduction of switching speed by a factor of 13 over prior state-of-the-art ternary memristor results. We anticipate extensions of this work can realize practical implementation where high data density is of critical importance.</div>

Broadband PXI local oscillator modules with low phase noise and fast switching speed

2011 ◽  
Author(s):  
Alexander Chenakin ◽  
Suresh Ojha ◽  
Shyam Nediyanchath ◽  
Vladimir Bykhovsky ◽  
Steven McClellan ◽  
...  
Keyword(s):  
Phase Noise ◽  
Local Oscillator ◽  
Switching Speed ◽  
Fast Switching ◽  
Low Phase Noise ◽  
Fast Switching Speed

scholarly journals High-Density Memristor-CMOS Ternary Logic Family

2020 ◽  
Author(s):  
Xiaoyuan Wang ◽  
Pengfei Zhou ◽  
Jason Eshraghian ◽  
Chih-Yang Lin ◽  
Herbert Ho-Ching Iu ◽  
...  
Keyword(s):  
Indium Tin Oxide ◽  
Practical Implementation ◽  
Switching Speed ◽  
High Data ◽  
Fast Switching ◽  
Data Density ◽  
Order Of Magnitude ◽  
High Transconductance ◽  
Logic Functions ◽  
Magnitude Improvement

<div>This paper presents the first experimental demonstration</div><div>of a ternary memristor-CMOS logic family. We systematically</div><div>design, simulate and experimentally verify the primitive</div><div>logic functions: the ternary AND, OR and NOT gates. These are then used to build combinational ternary NAND, NOR, XOR and XNOR gates, as well as data handling ternary MAX and MIN gates. Our simulations are performed using a 50-nm process which are verified with in-house fabricated indium-tin-oxide memristors, optimized for fast switching, high transconductance, and low current leakage. We obtain close to an order of magnitude improvement in data density over conventional CMOS logic, and a reduction of switching speed by a factor of 13 over prior state-of-the-art ternary memristor results. We anticipate extensions of this work can realize practical implementation where high data density is of critical importance.</div>

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