Some Results on Uniform Arithmetic Circuit Complexity

1991 ◽  
Vol 20 (343) ◽  
Author(s):  
Gudmund Skovbjerg Frandsen ◽  
Mark Valence ◽  
David Mix Barrington
Keyword(s):  
Arithmetic Function ◽  
Circuit Complexity ◽  
Arithmetic Circuits ◽  
Arithmetic Functions ◽  
Constant Depth ◽  
Arithmetic Circuit ◽  
Arithmetic Complexity ◽  
Polynomial Size ◽  
Threshold Circuits ◽  
Class Of Functions

We introduce a natural set of arithmetic expressions and define the complexity class AE to consist of all those arithmetic functions (over the fields F_(2)n) that are described by these expressions. We show that AE coincides with the class of functions that are computable with constant depth and polynomial size unbounded fan-in arithmetic circuits satisfying a natural uniformity constraint (DLOGTIME-uniformity). A 1-input and 1-output arithmetic function over the fields F_(2)n may be identified with an <em>n</em>-input and an n-output Boolean function when field elements are represented as bit strings. We prove that if some such representation is X-uniform (where X is P or DLOGTIME) then the arithmetic complexity of a function (measured with X-uniform unbounded fan-in arithmetic circuits) is identical to the Boolean complexity of this function (measured with X-uniform threshold circuits). We show the existence of a P-uniform representation and we give partial results concerning the existence of representations with more restrictive uniformity properties.

scholarly journals Uniform derandomization from pathetic lower bounds

2012 ◽  
Vol 370 (1971) ◽  
pp. 3512-3535 ◽  
Author(s):  
Eric Allender ◽  
V. Arvind ◽  
Rahul Santhanam ◽  
Fengming Wang
Keyword(s):  
Word Problem ◽  
Lower Bounds ◽  
Black Box ◽  
Arithmetic Circuits ◽  
List Type ◽  
Probabilistic Algorithms ◽  
Constant Depth ◽  
Subexponential Time ◽  
Polynomial Size ◽  
Threshold Circuits

The notion of probabilistic computation dates back at least to Turing, who also wrestled with the practical problems of how to implement probabilistic algorithms on machines with, at best, very limited access to randomness. A more recent line of research, known as derandomization, studies the extent to which randomness is superfluous. A recurring theme in the literature on derandomization is that probabilistic algorithms can be simulated quickly by deterministic algorithms, if one can obtain impressive (i.e. superpolynomial, or even nearly exponential) circuit size lower bounds for certain problems. In contrast to what is needed for derandomization, existing lower bounds seem rather pathetic. Here, we present two instances where ‘pathetic’ lower bounds of the form n 1+ ϵ would suffice to derandomize interesting classes of probabilistic algorithms. We show the following: — If the word problem over S 5 requires constant-depth threshold circuits of size n 1+ ϵ for some ϵ >0, then any language accepted by uniform polynomial size probabilistic threshold circuits can be solved in subexponential time (and, more strongly, can be accepted by a uniform family of deterministic constant-depth threshold circuits of subexponential size). — If there are no constant-depth arithmetic circuits of size n 1+ ϵ for the problem of multiplying a sequence of n  3×3 matrices, then, for every constant d , black-box identity testing for depth- d arithmetic circuits with bounded individual degree can be performed in subexponential time (and even by a uniform family of deterministic constant-depth AC 0 circuits of subexponential size).

scholarly journals An Algebraic Model for Bounding Threshold Circuit Depth

1988 ◽  
Vol 17 (239) ◽  
Author(s):  
Joan Boyar ◽  
Gudmund Skovbjerg Frandsen ◽  
Carl Sturtivant
Keyword(s):  
Threshold Model ◽  
Algebraic Model ◽  
Constant Factor ◽  
Arbitrary Integer ◽  
Arithmetic Circuit ◽  
Threshold Circuit ◽  
Polynomial Size ◽  
Algebraic Laws ◽  
Threshold Circuits ◽  
Circuit Depth

We define a new structured and general model of computation: circuits using arbitrary fan- in arithmetic gates over the characteristic two finite fields (<strong>F</strong>_2n). These circuits have only one input and one output. We show how they correspond naturally to boolean computations with n inputs and n outputs. We show that if circuit sizes are polynomially related then the arithmetic circuit depth and the threshold circuit depth to compute a given function differ by at most a constant factor. We use threshold circuits that allow arbitrary integer weights; however, we show that when compared to the usual threshold model, the depth measure of this generalised model only differs by at most a constant factor (at polynomial size). The fan-in of our arithmetic model is also unbounded in the most generous sense: circuit size is measured as the number of Sum and ½ gates; there is no bound on the number of ''wires'' . We show that these results are provable for any ''reasonable'' correspondance between bit strings of n-bits and elements of <strong>F</strong>_ 2n. And, we find two distinct characterizations of ''reasonable''. Thus, we have shown that arbitrary fan-in arithmetic computations over <strong>F</strong>_ 2n constitute a precise abstraction of boolean threshold computations with the pleasant property that various algebraic laws have been recovered.

On the Computational Power of Threshold Circuits with Sparse Activity

2006 ◽  
Vol 18 (12) ◽  
pp. 2994-3008 ◽  
Author(s):  
Kei Uchizawa ◽  
Rodney Douglas ◽  
Wolfgang Maass
Keyword(s):  
Neural Circuits ◽  
Circuit Complexity ◽  
Complexity Measure ◽  
Computational Power ◽  
Complexity Measures ◽  
Threshold Circuit ◽  
Polynomial Size ◽  
Threshold Circuits ◽  
Size Threshold ◽  
The Brain

Circuits composed of threshold gates (McCulloch-Pitts neurons, or perceptrons) are simplified models of neural circuits with the advantage that they are theoretically more tractable than their biological counterparts. However, when such threshold circuits are designed to perform a specific computational task, they usually differ in one important respect from computations in the brain: they require very high activity. On average every second threshold gate fires (sets a 1 as output) during a computation. By contrast, the activity of neurons in the brain is much sparser, with only about 1% of neurons firing. This mismatch between threshold and neuronal circuits is due to the particular complexity measures (circuit size and circuit depth) that have been minimized in previous threshold circuit constructions. In this letter, we investigate a new complexity measure for threshold circuits, energy complexity, whose minimization yields computations with sparse activity. We prove that all computations by threshold circuits of polynomial size with entropy O(log n) can be restructured so that their energy complexity is reduced to a level near the entropy of circuit states. This entropy of circuit states is a novel circuit complexity measure, which is of interest not only in the context of threshold circuits but for circuit complexity in general. As an example of how this measure can be applied, we show that any polynomial size threshold circuit with entropy O(log n) can be simulated by a polynomial size threshold circuit of depth 3. Our results demonstrate that the structure of circuits that result from a minimization of their energy complexity is quite different from the structure that results from a minimization of previously considered complexity measures, and potentially closer to the structure of neural circuits in the nervous system. In particular, different pathways are activated in these circuits for different classes of inputs. This letter shows that such circuits with sparse activity have a surprisingly large computational power.

scholarly journals Extended Smolensky's method

1990 ◽  
Vol 19 (315) ◽  
Author(s):  
Zhi-Li Zhang
Keyword(s):  
Boolean Functions ◽  
Simple Extension ◽  
Boolean Circuit ◽  
Constant Depth ◽  
Easy Consequence ◽  
Polynomial Size ◽  
Algebra Of Functions ◽  
Small Depth ◽  
Class Of Functions ◽  
General Ring

We give a simple extension of Smolensky's method by replacing Smolensky's concept of U^n_F-completeness by a new definition: F-hardness. An easy consequence of this definition is that F-hard functions do not have constant depth, polynomial size Boolean circuit with Mod_p, where p is the characteristic of F. By this extension, we can explicitly show many functions are hard, we establish a {\em Hardness Lemma} for a class of functions, and characterize when a function over a finite field is hard to compute by a small depth with Mod_p gates. Furthermore, we discuss the difficulties in extending Smolensky's theory over a general ring. While in general the nice relationship between the Boolean circuit model and the algebra of functions representing Boolean functions over a ring collapses, we can still extend the complexity theoretic notions introduced by this extended Smolensky's theory to a ring in order to classify functions over such a ring by their relative complexity. A result states that any representation of <em>Majority</em> over any ring R=Z/(r) for any fixed r in N is hard. This provides a kind of evidence that <em>Majority</em> is not AC^0 reducible to Mod_r.

scholarly journals Counting, fanout and the complexity of quantum ACC

2002 ◽  
Vol 2 (1) ◽  
pp. 35-65
Author(s):  
F. Green ◽  
S. Homer ◽  
C. Moore ◽  
C. Pollett
Keyword(s):  
Complexity Classes ◽  
Constant Depth ◽  
Classical Counterpart ◽  
Classical Class ◽  
Polynomial Size ◽  
Constant Depth Circuits ◽  
Language Classes ◽  
Threshold Circuits ◽  
Quantum Analog ◽  
Quantum Complexity

We propose definitions of QAC^0, the quantum analog of the classical class AC^0 of constant-depth circuits with AND and OR gates of arbitrary fan-in, and QACC[q], the analog of the class ACC[q] where Mod_q gates are also allowed. We prove that parity or fanout allows us to construct quantum MOD_q gates in constant depth for any q, so QACC[2] = QACC. More generally, we show that for any q,p > 1, MOD_q is equivalent to MOD_p (up to constant depth and polynomial size). This implies that QAC^0 with unbounded fanout gates, denoted QACwf^0, is the same as QACC[q] and QACC for all q. Since \ACC[p] \ne ACC[q] whenever p and q are distinct primes, QACC[q] is strictly more powerful than its classical counterpart, as is QAC^0 when fanout is allowed. This adds to the growing list of quantum complexity classes which are provably more powerful than their classical counterparts. We also develop techniques for proving upper bounds for QACC in terms of related language classes. We define classes of languages closely related to QACC[2] and show that restricted versions of them can be simulated by polynomial-size circuits. With further restrictions, language classes related to QACC[2] operators can be simulated by classical threshold circuits of polynomial size and constant depth.

Higher Moments of Fourier Coefficients of Cusp Forms

2015 ◽  
Vol 58 (3) ◽  
pp. 548-560
Author(s):  
Guangshi Lü ◽  
Ayyadurai Sankaranarayanan
Keyword(s):  
Modular Group ◽  
Fourier Coefficients ◽  
Arithmetic Function ◽  
Arithmetic Functions ◽  
Cusp Forms ◽  
Higher Moments ◽  
Integral Weight ◽  
Holomorphic Cusp Forms

AbstractLet Sk(Γ) be the space of holomorphic cusp forms of even integral weight k for the full modular group SL(z, ℤ). Let be the n-th normalized Fourier coefficients of three distinct holomorphic primitive cusp forms , and h(z) ∊ Sk3 (Γ), respectively. In this paper we study the cancellations of sums related to arithmetic functions, such as twisted by the arithmetic function λf(n).

scholarly journals Approximator: A Software Tool for Automatic Generation of Approximate Arithmetic Circuits

Computers ◽  
2022 ◽  
Vol 11 (1) ◽  
pp. 11
Author(s):  
Padmanabhan Balasubramanian ◽  
Raunaq Nayar ◽  
Okkar Min ◽  
Douglas L. Maskell
Keyword(s):  
Software Tool ◽  
Digital Signal ◽  
Automatic Generation ◽  
Arithmetic Circuits ◽  
Design Flow ◽  
Attractive Alternative ◽  
Design Environment ◽  
Verilog Hdl ◽  
Arithmetic Circuit ◽  
Practical Applications

Approximate arithmetic circuits are an attractive alternative to accurate arithmetic circuits because they have significantly reduced delay, area, and power, albeit at the cost of some loss in accuracy. By keeping errors due to approximate computation within acceptable limits, approximate arithmetic circuits can be used for various practical applications such as digital signal processing, digital filtering, low power graphics processing, neuromorphic computing, hardware realization of neural networks for artificial intelligence and machine learning etc. The degree of approximation that can be incorporated into an approximate arithmetic circuit tends to vary depending on the error resiliency of the target application. Given this, the manual coding of approximate arithmetic circuits corresponding to different degrees of approximation in a hardware description language (HDL) may be a cumbersome and a time-consuming process—more so when the circuit is big. Therefore, a software tool that can automatically generate approximate arithmetic circuits of any size corresponding to a desired accuracy would not only aid the design flow but also help to improve a designer’s productivity by speeding up the circuit/system development. In this context, this paper presents ‘Approximator’, which is a software tool developed to automatically generate approximate arithmetic circuits based on a user’s specification. Approximator can automatically generate Verilog HDL codes of approximate adders and multipliers of any size based on the novel approximate arithmetic circuit architectures proposed by us. The Verilog HDL codes output by Approximator can be used for synthesis in an FPGA or ASIC (standard cell based) design environment. Additionally, the tool can perform error and accuracy analyses of approximate arithmetic circuits. The salient features of the tool are illustrated through some example screenshots captured during different stages of the tool use. Approximator has been made open-access on GitHub for the benefit of the research community, and the tool documentation is provided for the user’s reference.

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