A Time-Domain z−1 Circuit with Digital Calibration

This paper presents a novel circuit of a z−1 operation which is suitable, as a basic building block, for time-domain topologies and signal processing. The proposed circuit employs a time register circuit which is based on the capacitor discharging method. The large variation of the capacitor discharging slope over technology process and chip temperature variations which affect the z−1 accuracy is improved using a novel digital calibration loop. The circuit is designed using a 28 nm Samsung FD-SOI process under 1 V supply voltage with 5 MHz sampling frequency. Simulation results validate the theoretical analysis presenting a variation of capacitor voltage discharging slope less than 5% over worst-case process corners for temperature between 0 °C and 100 °C while consuming only 30 μA. Also, the worst-case accuracy of z−1 operation is better than 33 ps for input pulse widths between 5 ns and 45 ns presenting huge improvement compared with the uncalibrated operator.

Rake Angle Effects on Ultrasonic-Assisted Edge Trimming of Multidirectional CFRP Laminates

Machining of CFRP composites is a process frequently accompanied with adverse effects on machined surface. The geometry of the cutting tool, linked primarily to influencing the cutting mechanism, could largely influence the induced damage. An optimum combination of tool material and geometry could improve the cut quality and prolong the tool life. This article investigates the effect of using tools having different rake angles in an ultrasonic-assisted edge trimming operation when cutting multidirectional CFRP laminates. A full-factorial experimental design was adopted to analyse the effect of parameters typically cutting speed, feed rate, rake angle, amplitude, and their interactions on machining performance indicators captured which were the cutting forces, tool wear, chip temperature, and surface roughness. The results showed that UAM mode contributed to the increase in cutting forces, tool wear, and chip temperature compared to conventional mode. On the other hand, UAM mode improved the quality of the machined surface. Additionally, the ultrasonic mode enhances the material removal mechanism using a tool with a negative rake angle.

Evaluating the Reliability Testing Acceleration Factor Based on VLSI Chip Infrared Image Analysis

A new approach for evaluating the acceleration factor of forced reliability tests of very large scale integrated circuits (VLSI) is presented. The approach is based on subjecting the VLSI chip to an infrared image analysis. Currently, the VLSI reliability testing acceleration factor is evaluated based on the Arrhenius law, according to which this factor depends on the chip temperature. The chip temperature, in turn, is represented by the sum of the chip package temperature and the product of the maximum dissipated power and the chip-to-package thermal resistance. The drawback of the existing method is that the calculation is carried out for only a single chip temperature value that was obtained analytically. But the VLSI is a complex system, and it is not correct to judge about the testing acceleration factor proceeding from a single chip temperature value. It is proposed to calculate the VLSI reliability testing acceleration factor based on the temperatures at many points on the VLSI chip surface. This will make it possible to take into account the test sequence influence on the temperature distribution over the chip surface, thereby helping select the test sequences so that to obtain the maximal and uniform chip heating. Owing to the proposed method, it becomes possible to evaluate the testing acceleration factor more accurately and also to potentially increase it by choosing the test sequence. A more accurate evaluation of the acceleration factor allows the reliability tests reliability to be improved. The proposed method for evaluating the acceleration factor was validated experimentally. The workplace is described, the calculations of the reliability testing acceleration factors using two approaches are carried out, and their comparison is given.

IGBT CHIP TEMPERATURE CONTROL METHOD IN REAL TIME

The work is devoted to the study of temperature–sensitive parameters of power IGBT transistors. A method for measuring IGBT temperature based on temperature–sensitive parameters is considered. An experimental estimate of the temperature dependence of the temperature–sensitive parameter Rgint.