Enhanced RAM Simulation in Succinct Space

We describe two recent results on space-efficient functional random access memory (RAM), which is RAM with non-standard functionalities. The first is about oblivious RAM, which enables a remote database to be accessed without revealing to the database owner which part of the database is being accessed. The other is about wear leveling, which enables the number of updates to be balanced among all the memory cells regardless of the content of the computation being performed on the memory.

Tnvmalloc: A Thread-Level-Based Wear-Aware Allocator for Nonvolatile Main Memory

The nonvolatile main memory (NVMM) has the advantages of near-DRAM speed, byte-addressability, and persistence, and presents limitations in write durability. The memory allocator, a fundamental data structure of memory management, can effectively mitigate the wear speed, thereby prolonging the NVMM lifetime. Nevertheless, balancing the performance and writing reliability in single and multi-thread scenarios is still an open problem for NVMM allocators. In this paper, we propose a thread-level wear-aware allocator (Tnvmalloc) that divides the NVMM space into multiple management granularities and then dynamically selects the optimal blocks using a wear-leveling strategy based on allocation requests and wear records. Experiments show that the proposed Tnvmalloc provides more than 10 times improvement in wear-leveling than typical allocators Glibc malloc, NVMalloc, and nvm_malloc, which becomes obvious especially in multi-threaded scenarios. Moreover, when allocating large memory blocks, Tnvmalloc achieves three times faster than that of NVMalloc.

A Block Classification Method with Monitor and Restriction in NAND Flash memory

In this paper, we propose a block classification with monitor and restriction (BCMR) method to isolate and reduce the interference of blocks in garbage collection and wear leveling. The proposed method monitors the endurance variation of blocks during garbage collection and detects hot blocks by making a restriction condition based on this information. This method induces block classification by its update frequency for garbage collection and wear leveling, resulting in a prolonged lifespan for NAND flash memory systems. The performance evaluation results show that the BCMR method prolonged the life of NAND flash memory systems by 3.95% and reduced the standard deviation per block by 7.4%, on average.