Tnvmalloc: A Thread-Level-Based Wear-Aware Allocator for Nonvolatile Main Memory

The nonvolatile main memory (NVMM) has the advantages of near-DRAM speed, byte-addressability, and persistence, and presents limitations in write durability. The memory allocator, a fundamental data structure of memory management, can effectively mitigate the wear speed, thereby prolonging the NVMM lifetime. Nevertheless, balancing the performance and writing reliability in single and multi-thread scenarios is still an open problem for NVMM allocators. In this paper, we propose a thread-level wear-aware allocator (Tnvmalloc) that divides the NVMM space into multiple management granularities and then dynamically selects the optimal blocks using a wear-leveling strategy based on allocation requests and wear records. Experiments show that the proposed Tnvmalloc provides more than 10 times improvement in wear-leveling than typical allocators Glibc malloc, NVMalloc, and nvm_malloc, which becomes obvious especially in multi-threaded scenarios. Moreover, when allocating large memory blocks, Tnvmalloc achieves three times faster than that of NVMalloc.

Accelerated Diffusion-Based Sampling by the Non-Reversible Dynamics with Skew-Symmetric Matrices

Langevin dynamics (LD) has been extensively studied theoretically and practically as a basic sampling technique. Recently, the incorporation of non-reversible dynamics into LD is attracting attention because it accelerates the mixing speed of LD. Popular choices for non-reversible dynamics include underdamped Langevin dynamics (ULD), which uses second-order dynamics and perturbations with skew-symmetric matrices. Although ULD has been widely used in practice, the application of skew acceleration is limited although it is expected to show superior performance theoretically. Current work lacks a theoretical understanding of issues that are important to practitioners, including the selection criteria for skew-symmetric matrices, quantitative evaluations of acceleration, and the large memory cost of storing skew matrices. In this study, we theoretically and numerically clarify these problems by analyzing acceleration focusing on how the skew-symmetric matrix perturbs the Hessian matrix of potential functions. We also present a practical algorithm that accelerates the standard LD and ULD, which uses novel memory-efficient skew-symmetric matrices under parallel-chain Monte Carlo settings.

CONSULT: accurate contamination removal using locality-sensitive hashing

A fundamental question appears in many bioinformatics applications: Does a sequencing read belong to a large dataset of genomes from some broad taxonomic group, even when the closest match in the set is evolutionarily divergent from the query? For example, low-coverage genome sequencing (skimming) projects either assemble the organelle genome or compute genomic distances directly from unassembled reads. Using unassembled reads needs contamination detection because samples often include reads from unintended groups of species. Similarly, assembling the organelle genome needs distinguishing organelle and nuclear reads. While k-mer-based methods have shown promise in read-matching, prior studies have shown that existing methods are insufficiently sensitive for contamination detection. Here, we introduce a new read-matching tool called CONSULT that tests whether k-mers from a query fall within a user-specified distance of the reference dataset using locality-sensitive hashing. Taking advantage of large memory machines available nowadays, CONSULT libraries accommodate tens of thousands of microbial species. Our results show that CONSULT has higher true-positive and lower false-positive rates of contamination detection than leading methods such as Kraken-II and improves distance calculation from genome skims. We also demonstrate that CONSULT can distinguish organelle reads from nuclear reads, leading to dramatic improvements in skim-based mitochondrial assemblies.

Multifunctional molybdenum disulfide flash memory using a PEDOT:PSS floating gate

Two-dimensional transition metal dichalcogenide materials (TMDs), such as molybdenum disulfide (MoS2), have been considered promising candidates for future electronic applications owing to their electrical, mechanical, and optical properties. Here, we present a new concept for multifunctional MoS2 flash memory by combining a MoS2 channel with a PEDOT:PSS floating layer. The proposed MoS2 memory devices exhibit a switching ratio as high as 2.3 × 107, a large memory window (54.6 ± 7.80 V), and high endurance (>1,000 cycles). As the PEDOT:PSS film enables a low-temperature solution-coating process and mechanical flexibility, the proposed P-memory can be embedded on a polyimide substrate over a rigid silicon substrate, offering high mechanical endurance (over 1,000 cycle bending test). Furthermore, both MoS2 and PEDOT:PSS have a bandgap that is desirable in optoelectronic memory operation, where charge carriers are stored differently in the floating gate depending on light illumination. As a new application that combines photodiodes and memory functions, we demonstrate multilevel memory programming based on light intensity and color.