High Temperature Reliability Investigations up to 350 °C of Gate Oxide Capacitors realized in a Silicon-on-Insulator CMOS-Technology

Standard Bulk-CMOS-technology targets use-temperatures of not more than 175 °C. With Silicon-on-Insulator-technologies (SOI), digital and analog circuitry is possible up to 250 °C and even more, but performance and reliability are strongly affected at these high temperatures. One of the main critical factors is the gate oxide quality and its reliability. In this paper, we present a study of gate oxide capacitor time-dependent dielectric breakdown (TDDB) measurements at temperatures up to 350 °C. The experiments were carried out on gate oxide capacitor structures which were realized in the Fraunhofer 1.0 μm SOI-CMOS process. This technology is based on 200 mm wafers and features, among others, three layers of tungsten metallization with excellent reliability concerning electromigration, voltage independent capacitors, high resistance resistors, and single-poly-EEPROM cells. The gate oxide thickness is 40 nm. Using the data of the TDDB-measurements, the behavior of field and temperature acceleration parameters at temperatures up to 350 °C was evaluated. For a more detailed investigation, the current evolution in time was also studied. An analysis of the oxide breakdown conditions, in particular the field and temperature dependence of the charge to breakdown and the current just before breakdown, completes the study. The presented data provide important information about accelerated oxide reliability testing beyond 250 °C, and make it possible to quickly evaluate the reliability of high temperature CMOS-technologies at use-temperature.

High Temperature Reliability Investigations of EEPROM Memory Cells Realised in Silicon-on-Insulator (SOI) Technology

Microelectronic manufacturing progresses not only towards further miniaturisation, but also application fields tend to become more and more diverse. Recently there has been an increasing demand for electronic devices and circuits that function in harsh environments such as high temperatures. Under these conditions, reliability aspects are highly critical and testing remains a great challenge. A versatile CMOS process based on 200 mm thin film Silicon-on-Insulator (SOI) wafers is in production at Fraunhofer IMS. It features three layers of tungsten metallisation for optimum electromigration reliability, voltage independent capacitors, high resistance resistors and single-poly-EEPROM cells. Non-volatile memories such as EEPROMs are a key technology that enables flexible data storage, for example of calibration and measurement information. The reliability of these devices is especially crucial in high temperature applications since charge loss is drastically increased in this case. The behaviour of single-poly-EEPROM cells, produced in the process described before, was evaluated up to 450 °C. Data retention tests at temperatures ranging from 160 °C to 450 °C and write/erase cycling tests up to 400 °C were performed. The dependence of write/erase cycling on both temperature and tunnel oxide thickness was studied. These data provide an important foundation to extend the application of high temperature electronics to its maximum limits. The results show that EEPROM cells can be used for special applications even at temperatures higher than 250 °C.