delay fault testing Latest Research Papers

Variation-Aware Delay Fault Testing for Carbon-Nanotube FET Circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2020.3045417 ◽

2021 ◽

pp. 1-14

Author(s):

Sanmitra Banerjee ◽

Arjun Chaudhuri ◽

August Ning ◽

Krishnendu Chakrabarty

Keyword(s):

Carbon Nanotube ◽

Fault Testing ◽

Delay Fault ◽

Delay Fault Testing ◽

Carbon Nanotube Fet

Power Supply Noise-Aware At-Speed Delay Fault Testing of Monolithic 3-D ICs

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2021.3108787 ◽

2021 ◽

pp. 1-14

Author(s):

Shao-Chun Hung ◽

Yi-Chen Lu ◽

Sung Kyu Lim ◽

Krishnendu Chakrabarty

Keyword(s):

Power Supply ◽

Power Supply Noise ◽

Fault Testing ◽

Delay Fault ◽

Delay Fault Testing ◽

Supply Noise

Power Supply Noise-Aware Scan Test Pattern Reshaping for At-Speed Delay Fault Testing of Monolithic 3D ICs *

2020 IEEE 29th Asian Test Symposium (ATS) ◽

10.1109/ats49688.2020.9301568 ◽

2020 ◽

Author(s):

Shao-Chun Hung ◽

Yi-Chen Lu ◽

Sung Kyu Lim ◽

Krishnendu Chakrabarty

Keyword(s):

Power Supply ◽

Test Pattern ◽

Power Supply Noise ◽

Fault Testing ◽

Delay Fault ◽

Delay Fault Testing ◽

3D Ics ◽

Scan Test ◽

Supply Noise

Applying Neural Networks to Delay Fault Testing: Test Point Insertion and Random Circuit Training

2019 IEEE 28th Asian Test Symposium (ATS) ◽

10.1109/ats47505.2019.000-7 ◽

2019 ◽

Cited By ~ 3

Author(s):

Spencer Millican ◽

Yang Sun ◽

Soham Roy ◽

Vishwani Agrawal

Keyword(s):

Neural Networks ◽

Test Point ◽

Fault Testing ◽

Circuit Training ◽

Delay Fault ◽

Delay Fault Testing ◽

Test Point Insertion

Special Session: Delay Fault Testing - Present and Future

2019 IEEE 37th VLSI Test Symposium (VTS) ◽

10.1109/vts.2019.8758662 ◽

2019 ◽

Cited By ~ 2

Author(s):

Jubayer Mahmod ◽

Spencer Millican ◽

Ujjwal Guin ◽

Vishwani Agrawal

Keyword(s):

Special Session ◽

Fault Testing ◽

Delay Fault ◽

Delay Fault Testing

Delay Fault Testing of VLSI Circuits

Test Generation of Crosstalk Delay Faults in VLSI Circuits ◽

10.1007/978-981-13-2493-2_2 ◽

2018 ◽

pp. 15-35 ◽

Cited By ~ 1

Author(s):

S. Jayanthy ◽

M. C. Bhuvaneswari

Keyword(s):

Vlsi Circuits ◽

Fault Testing ◽

Delay Fault ◽

Delay Fault Testing

Cost Effective Adaptive Voltage Scaling Using Path Delay Fault Testing

2018 IEEE East-West Design & Test Symposium (EWDTS) ◽

10.1109/ewdts.2018.8524693 ◽

2018 ◽

Author(s):

Mahroo Zandrahimi ◽

Philippe Debaud ◽

Armand Castillejo ◽

Zaid Al-Ars

Keyword(s):

Cost Effective ◽

Voltage Scaling ◽

Path Delay ◽

Fault Testing ◽

Delay Fault ◽

Delay Fault Testing ◽

Path Delay Fault ◽

Path Delay Fault Testing

A Boolean model for delay fault testing of emerging digital technologies based on ambipolar devices

2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) ◽

10.23919/date.2018.8342024 ◽

2018 ◽

Cited By ~ 1

Author(s):

Marcello Dalpasso ◽

Davide Bertozzi ◽

Michele Favalli

Keyword(s):

Digital Technologies ◽

Boolean Model ◽

Fault Testing ◽

Delay Fault ◽

Delay Fault Testing

Aging monitor reuse for small delay fault testing

2017 IEEE 35th VLSI Test Symposium (VTS) ◽

10.1109/vts.2017.7928921 ◽

2017 ◽

Cited By ~ 2

Author(s):

Chang Liu ◽

Michael A. Kochte ◽

Hans-Joachim Wunderlich

Keyword(s):

Fault Testing ◽

Delay Fault ◽

Delay Fault Testing ◽

Small Delay

Power Supply Voltage Control for Eliminating Overkills and Underkills in Delay Fault Testing

IEICE Transactions on Electronics ◽

10.1587/transele.e99.c.1219 ◽

2016 ◽

Vol E99.C (10) ◽

pp. 1219-1225

Author(s):

Masahiro ISHIDA ◽

Toru NAKURA ◽

Takashi KUSAKA ◽

Satoshi KOMATSU ◽

Kunihiro ASADA

Keyword(s):

Power Supply ◽

Supply Voltage ◽

Voltage Control ◽

Fault Testing ◽

Power Supply Voltage ◽

Delay Fault ◽

Delay Fault Testing

delay fault testing
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

Variation-Aware Delay Fault Testing for Carbon-Nanotube FET Circuits

Power Supply Noise-Aware At-Speed Delay Fault Testing of Monolithic 3-D ICs

Power Supply Noise-Aware Scan Test Pattern Reshaping for At-Speed Delay Fault Testing of Monolithic 3D ICs *

Applying Neural Networks to Delay Fault Testing: Test Point Insertion and Random Circuit Training

Special Session: Delay Fault Testing - Present and Future

Delay Fault Testing of VLSI Circuits

Cost Effective Adaptive Voltage Scaling Using Path Delay Fault Testing

A Boolean model for delay fault testing of emerging digital technologies based on ambipolar devices

Aging monitor reuse for small delay fault testing

Power Supply Voltage Control for Eliminating Overkills and Underkills in Delay Fault Testing

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delay fault testingRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Variation-Aware Delay Fault Testing for Carbon-Nanotube FET Circuits

Power Supply Noise-Aware At-Speed Delay Fault Testing of Monolithic 3-D ICs

Power Supply Noise-Aware Scan Test Pattern Reshaping for At-Speed Delay Fault Testing of Monolithic 3D ICs *

Applying Neural Networks to Delay Fault Testing: Test Point Insertion and Random Circuit Training

Special Session: Delay Fault Testing - Present and Future

Delay Fault Testing of VLSI Circuits

Cost Effective Adaptive Voltage Scaling Using Path Delay Fault Testing

A Boolean model for delay fault testing of emerging digital technologies based on ambipolar devices

Aging monitor reuse for small delay fault testing

Power Supply Voltage Control for Eliminating Overkills and Underkills in Delay Fault Testing

delay fault testing
Recently Published Documents