Adaptive Mho Distance Protection for Interconnected Transmission Lines Compensated with Thyristor Controlled Series Capacitor

This paper proposes an adaptive dynamic Mho distance relay based on a phase comparator scheme for protecting interconnected transmission networks compensated with a Thyristor Controlled Series Capacitor (TCSC). The proposed relay uses an impedance index factor to initiate the fault detection subroutine. The RMS of the positive sequence current of the faulted loop and the TCSC terminal current are compared for TCSC zone identification. A phase comparator for ground and phase distance elements is proposed, relying on the positive sequence voltage as a polarized memory quantity, while the operating and polarizing quantities are developed using estimated TCSC impedance to mitigate its negative impact. The proposed scheme is easy in implementation and independent on synchronized data transfer, as minimum communication requirements are needed. To evaluate the performance of the proposed scheme, extensive simulation studies were carried out on an IEEE9 bus system compensated with TCSC for different firing angles covering four modes of TCSC operations, different fault types, and fault locations. In addition, an IEEE-39 bus network, as a large interconnected system, is tested for validation purposes. The achieved results designate the precision of the proposed scheme. Moreover, the results indicate its effectiveness for fault resistance tolerance, close-in three phase faults, and stable power swing phenomenon compared with conventional relays.

Congestion Management in Deregulated Power System using Adaptive Moth Swarm Optimization

Transmission line congestion is considered the most acute trouble during the operation of the power system. Therefore, congestion management acts as an effective tool in utilizing the available power without breaking the system hindrances or limitations. Over the past few years, determining an optimal location and size of the devices have pinched a great deal of consideration. Numerous approaches have been established to mitigate the congestion rate and this paper aims to enhance the line congestion and minimize power loss by determining the compensation rate and optimal location of thyristor-controlled series capacitor (TCSC) using adaptive moth swarm optimization (AMSO) algorithm. An adaptive moth swarm AMSO algorithm utilizes the performances of moth flame and chaotic local search-based shrinking scheme of the bacterial foraging optimization algorithm. The proposed AMSO approach is executed and discussed for IEEE-30 bus system for determining the optimal location of single TCSC and dual TCSC. In addition to this, the proposed algorithm is compared with various other existing approaches and the results thus obtained provide better performances when compared with other techniques.

Controller design for output constrained thyristor controlled series capacitor (TCSC) of time-delayed power system

Thyristor Controlled Series Capacitor (TCSC) is employed as actuator in an interconnected power system using Supplementary Damping Controller (SDC) to enhance the power transfer capabilities between areas as well as damp out the Inter-Area Low-Frequency (IALF) oscillations by varying the impedance of transmission lines. The time-varying delays in the feedback loop and asymmetric saturation limits at the output of TCSC may reduce the performance of the designed controller and lead to closed-loop instability if these are not considered in the process of controller design. Usually, a Minimum Absolute Saturation Bound technique (MASB) is used to convert asymmetric saturation limits into symmetric one. However, such consideration provides an apparent conservative and degrades the performance of the control system. To reduce the conservative in the control design process, a Normalized Saturation Bound (NSB) technique is used in this paper to convert asymmetric saturation limits of TCSC of time-delayed power system. The L-K functional and generalized sector conditions are utilized in the proposed controller design process to compensate the effect of time-varying delay and converted symmetric saturation limits. Sufficient conditions required for controller design are formulated in LMI form. 2-area 4-machine power model is used to verify the performance of the designed controller. From the simulation results, it is observed that the designed controller is giving superior performance in the present of time-varying delays and asymmetric saturation as compared to the designed controller using MASB technique.

Comparative Analysis on Optimal Placement of TCSC under Single Line Contingency by Using PSO and GA

In the network contingencies, the branch overloading and voltage violation are the most serious conditions and may lead to security problems. The application of Thyristor Controlled Series Capacitor (TCSC) can provide the required apparent reactance smoothly and rapidly and can reduce network contingency problems. This paper focuses an application of Particle Swarm Optimization (PSO) and Genetic Algorithm (GA) to find out the optimal locations of TCSC devices under single contingency to reduce the voltage drops at system buses and line flow improvement on transmission lines. The suitability of the proposed technique is examined on Myanmar Electric Power System. The optimized location provided by each method is applied to single line contingency condition and the responses are observed. According to the simulation results, PSO method can provide the better the stability performance under single line contingency.