Energy-Efficient Harmonic Transponder Based on On-Off Keying Modulation for Both Identification and Sensing

This paper presents a novel passive Schottky-diode frequency doubler equipped with an on-off keying (OOK) modulation port to be used in harmonic transponders for both identification and sensing applications. The amplitude modulation of the second-harmonic output signal is achieved by driving a low-frequency MOSFET, which modifies the dc impedance termination of the doubler. Since the modulation signal is applied to the gate port of the transistor, no static current is drained. A proof-of-concept prototype was manufactured and tested, operating at 1.04 GHz. An on/off ratio of 23 dB was observed in the conversion loss of the doubler for an available input power of −10 dBm. The modulation port of the circuit was excited with a square wave (fm up to 15 MHz), and the measured sidebands in the spectrum featured a good agreement with the theory. Then, the doubler was connected to a harmonic antenna system and tested in a wireless experiment for fm up to 1 MHz, showing an excellent performance. Finally, an experiment was conducted where the output signal of the doubler was modulated by a reed switch used to measure the rotational speed of an electrical motor. This work opens the door to a new class of frequency doublers, suitable for ultra low-power harmonic transponders for identification and sensing applications.

Comparing Novel MMIC and Hybrid Circuit High Efficiency GaAs Schottky Diode mm-Wave Frequency Doublers

A novel Schottky diode frequency doubler in E-band, using biased series-connected diodes in the output waveguide, is reported. The doubler was implemented using a GaAs Schottky Monolithic Microwave Integrated Circuit (MMIC) process with integrated capacitors and beam leads. A comparison is made with a hybrid doubler using a more conventional single-ended configuration with two discrete diodes in a planar transmission line circuit. Both devices exhibit excellent performance over the 67–78 GHz design bandwidth, with the novel MMIC design producing 25 to 55 mW at 12 to 22% power conversion efficiency. Good agreement of measurements with simulations was also found.

FPGA Implementation of Vedic Squarer for Communication Systems

The squarer or squaring circuit is extensively used in communication systems as a mathematical function with applications of frequency doublers, finite impulse response (FIR) filters, peak amplitude detectors, digital processors and analog multipliers, etc. and especially for square law detection circuits. Vedic multipliers are popular mainly for it’s simplicity in the literature of digital multipliers. Recently proposed 2-bit square calculator or self-multiplier already took the attraction of the researchers. In this paper, two bits squarer or self-multiplier or square calculator has been successfully coded using VHDL, verified in Xilinx tool and finally implemented in popular FPGA Spartan kit.