A Simple Technique for Studying Chaos Using Jerk Equation with Discrete Time Sine Map

Over the past decade, chaotic systems have found their immense application in different fields, which has led to various generalized, novel, and modified chaotic systems. In this paper, the general jerk equation is combined with a scaled sine map, which has been approximated in terms of a polynomial using Taylor series expansion for exhibiting chaotic behavior. The paper is based on numerical simulation and experimental verification of the system with four control parameters. The proposed system’s chaotic behavior is verified by calculating different chaotic invariants using MATLAB, such as bifurcation diagram, 2-D attractor, Fourier spectra, correlation dimension, and Maximum Lyapunov Exponent. Experimental verification of the system was carried out using Op-Amps with analog multipliers.

FPGA Implementation of Vedic Squarer for Communication Systems

The squarer or squaring circuit is extensively used in communication systems as a mathematical function with applications of frequency doublers, finite impulse response (FIR) filters, peak amplitude detectors, digital processors and analog multipliers, etc. and especially for square law detection circuits. Vedic multipliers are popular mainly for it’s simplicity in the literature of digital multipliers. Recently proposed 2-bit square calculator or self-multiplier already took the attraction of the researchers. In this paper, two bits squarer or self-multiplier or square calculator has been successfully coded using VHDL, verified in Xilinx tool and finally implemented in popular FPGA Spartan kit.