mapping mechanism
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2022 ◽  
Vol 355 ◽  
pp. 03054
Author(s):  
Dehua Wu ◽  
Wan’ang Xiao ◽  
Shan Gao ◽  
Wanlin Gao

The Spectre attacks exploit the speculative execution vulnerabilities to exfiltrate private information by building a leakage channel. Creation of a leakage channel is the basic element for spectre attacks, among which the cache-tag side channel is considered to be the most serious one. To block the leakage channels, a novel cache applies Dynamic Mapping technology, named DmCache, is presented in this paper. DmCache applies a dynamic mapping mechanism to temporarily store all the cache lines polluted by speculative execution and keep invisible when accessing. Then it monitors the head of the reorder buffer to determine which polluted cache line can become visible. In this paper, we demonstrated that Spectre attacks exerted no impact on a processor system equipped with DmCache based on the analysis of the processor’s circuit behaviour, which equipped with the DmCache and under the Spectre attack.


2021 ◽  
Author(s):  
Jiahui Sun ◽  
Ningchun Liu ◽  
Shuai Gao ◽  
Wei Su
Keyword(s):  

Author(s):  
Mingwen Bi ◽  
Qingchuan Zhang ◽  
Min Zuo ◽  
Zelong Xu ◽  
Qingyu Jin

The intelligent question answering system aims to provide quick and concise feedback on the questions of users. Although the performance of phrase-level and numerous attention models have been improved, the sentence components and position information are not emphasized enough. This article combines Ci-Lin and word2vec to divide all of the words in the question-answer pairs into groups according to the semantics and select one kernel word in each group. The remaining words are common words and realize the semantic mapping mechanism between kernel words and common words. With this Chinese semantic mapping mechanism, the common words in all questions and answers are replaced by the semantic kernel words to realize the normalization of the semantic representation. Meanwhile, based on the bi-directional LSTM model, this article introduces a method of the combination of semantic role labeling and positional context, dividing the sentence into multiple semantic segments according to semantic logic. The weight is given to the neighboring words in the same semantic segment and propose semantic role labeling position attention based on the bi-directional LSTM model (BLSTM-SRLP). The good performance of the BLSTM-SRLP model has been demonstrated in comparative experiments on the food safety field dataset (FS-QA).


2021 ◽  
Vol 11 (2) ◽  
pp. 243-258
Author(s):  
Wenqi Lou ◽  
◽  
Chao Wang ◽  
Lei Gong ◽  
Xuehai Zhou

Author(s):  
Cynthia Pamela Audisio ◽  
Maia Julieta Migdalek

AbstractExperimental research has shown that English-learning children as young as 19 months, as well as children learning other languages (e.g., Mandarin), infer some aspects of verb meanings by mapping the nominal elements in the utterance onto participants in the event expressed by the verb. The present study assessed this structure or analogical mapping mechanism (SAMM) on naturalistic speech in the linguistic environment of 20 Spanish-learning infants from Argentina (average age 19 months). This study showed that the SAMM performs poorly – at chance level – especially when only noun phrases (NPs) included in experimental studies of the SAMM were parsed. If agreement morphology is considered, the performance is slightly above chance but still very poor. In addition, it was found that the SAMM performs better on intransitive and transitive verbs, compared to ditransitives. Agreement morphology has a beneficial effect only on transitive and ditransitive verbs. On the whole, concerns are raised about the role of the SAMM in infants’ interpretation of verb meaning in natural exchanges.


Electronics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 1647
Author(s):  
Yi Yang ◽  
Wenwen Fu ◽  
Jinli Yan ◽  
Lu Tang ◽  
Zhigang Sun

A hierarchical method is often used to simplify the design of complex logic. However, when the hierarchical method is used to implement protocol control, there is no suitable decoupling method to divide the sophisticated protocol control into a series of small control logics. For this reason, this paper designs and implements the DoubleDeck model composed of a top state machine and a set of bottom state machines. The model divides the protocol control logic into protocol state conversion logic and processing logic based on hierarchical idea. Simultaneously, DoubleDeck also provides a bottom deck mapping mechanism (BDM) for all protocol control processing logic. Based on the BDM mechanism, developers can quickly implement the bottom state machine array. Next, we present the hardware design of DoubleDeck and prototype the time synchronization protocol on an FPGA array. The results show that DoubleDeck can be used as a design model to guide the implementation of complex protocol control logic. Compared with the finite state machine (FSM), DoubleDeck uses the BDM mechanism to implement three protocols can reduce the amount of code for developers by 30%.


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