SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing
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Published By Springer US

9781441953070, 9781475765274

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

The Role of Test Protocols in Automated Test Generation for Embedded-Core-Based System ICs

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing ◽

10.1007/978-1-4757-6527-4_5 ◽

2002 ◽

pp. 71-90 ◽

Cited By ~ 3

Author(s):

Erik Jan Marinissen

Keyword(s):

Test Generation ◽

Automated Test Generation ◽

Automated Test

On IEEE P1500’s Standard for Embedded Core Test

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing ◽

10.1007/978-1-4757-6527-4_1 ◽

2002 ◽

pp. 1-19 ◽

Cited By ~ 3

Author(s):

Erik Jan Marinissen ◽

Rohit Kapur ◽

Maurice Lousberg ◽

Teresa McLaurin ◽

Mike Ricchetti ◽

...

Keyword(s):

Ieee P1500

An Integrated Framework for the Design and Optimization of SOC Test Solutions

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing ◽

10.1007/978-1-4757-6527-4_2 ◽

2002 ◽

pp. 21-36 ◽

Cited By ~ 7

Author(s):

Erik Larsson ◽

Zebo Peng ◽

Krishnendu Chakrabarty

Keyword(s):

Integrated Framework ◽

Design And Optimization ◽

Soc Test

Deterministic Test Vector Compression/Decompression for Systems-on-a-Chip Using an Embedded Processor

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing ◽

10.1007/978-1-4757-6527-4_9 ◽

2002 ◽

pp. 139-150 ◽

Cited By ~ 5

Author(s):

Abhijit Jas ◽

Nur A. Touba ◽

Krishnendu Chakrabarty

Keyword(s):

Test Vector ◽

Embedded Processor ◽

Test Vector Compression

CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing ◽

10.1007/978-1-4757-6527-4_6 ◽

2002 ◽

pp. 91-109 ◽

Cited By ~ 2

Author(s):

Mounir Benabdenbi ◽

Walid Maroufi ◽

Meryem Marzouki ◽

Krishnendu Chakrabarty

Keyword(s):

Test Access Mechanism ◽

Chip Testing

A Novel Reconfigurable Wrapper for Testing of Embedded Core-Based SOCs and its Associated Scheduling Algorithm

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing ◽

10.1007/978-1-4757-6527-4_4 ◽

2002 ◽

pp. 51-70 ◽

Cited By ~ 2

Author(s):

Sandeep Koranne ◽

Krishnendu Chakrabarty

Keyword(s):

Scheduling Algorithm

Signal Integrity: Fault Modeling and Testing in High-Speed SoCs

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing ◽

10.1007/978-1-4757-6527-4_12 ◽

2002 ◽

pp. 175-190 ◽

Cited By ~ 8

Author(s):

Mehrdad Nourani ◽

Amir Attarha ◽

Krishnendu Chakrabarty

Keyword(s):

High Speed ◽

Signal Integrity ◽

Fault Modeling

Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing ◽

10.1007/978-1-4757-6527-4_11 ◽

2002 ◽

pp. 165-174

Author(s):

Chen Li ◽

Xiaoliang Bai ◽

Sujit Dey ◽

Krishnendu Chakrabarty

Keyword(s):

Embedded Processor ◽

On Chip ◽

Processor Cores

Diagnostic Data Compression Techniques for Embedded Memories with Built-In Self-Test

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing ◽

10.1007/978-1-4757-6527-4_10 ◽

2002 ◽

pp. 151-163

Author(s):

Jin-Fu Li ◽

Ruey-Shing Tzeng ◽

Cheng-Wen Wu ◽

Krishnendu Chakrabarty

Keyword(s):

Data Compression ◽

Diagnostic Data ◽

Self Test ◽

Built In Self Test ◽

Embedded Memories

An Integrated Approach to Testing Embedded Cores and Interconnects Using Test Access Mechanism (TAM) Switch

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing ◽

10.1007/978-1-4757-6527-4_7 ◽

2002 ◽

pp. 111-121 ◽

Cited By ~ 1

Author(s):

Subhayu Basu ◽

Indranil Sengupta ◽

Dipanwita Roy Chowdhury ◽

Sudipta Bhawmik ◽

Krishnendu Chakrabarty

Keyword(s):

Integrated Approach ◽

Test Access Mechanism ◽

Embedded Cores

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic TestingLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer US

The Role of Test Protocols in Automated Test Generation for Embedded-Core-Based System ICs

On IEEE P1500’s Standard for Embedded Core Test

An Integrated Framework for the Design and Optimization of SOC Test Solutions

Deterministic Test Vector Compression/Decompression for Systems-on-a-Chip Using an Embedded Processor

CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing

A Novel Reconfigurable Wrapper for Testing of Embedded Core-Based SOCs and its Associated Scheduling Algorithm

Signal Integrity: Fault Modeling and Testing in High-Speed SoCs

Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores

Diagnostic Data Compression Techniques for Embedded Memories with Built-In Self-Test

An Integrated Approach to Testing Embedded Cores and Interconnects Using Test Access Mechanism (TAM) Switch

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation - Frontiers in Electronic Testing
Latest Publications