International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)

Improving gate oxide integrity (GOI) of a W/WNx/dual-poly Si stacked-gate by using wet-hydrogen oxidation in 0.14-μm CMOS devices

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) ◽

10.1109/iedm.1998.746383 ◽

2002 ◽

Cited By ~ 3

Author(s):

K. Ohnishi ◽

N. Yamamoto ◽

T. Uchino ◽

Y. Hanaoka ◽

R. Tsuchiya ◽

...

Keyword(s):

Hydrogen Oxidation ◽

Gate Oxide ◽

Gate Oxide Integrity

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Novel 0.44 μm/sup 2/ Ti-salicide STI cell technology for high-density NOR flash memories and high performance embedded application

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) ◽

10.1109/iedm.1998.746517 ◽

2002 ◽

Author(s):

H. Watanabe ◽

S. Yamada ◽

M. Tanimoto ◽

M. Matsui ◽

S. Kitamura ◽

...

Keyword(s):

High Performance ◽

High Density ◽

Flash Memories ◽

Cell Technology ◽

Embedded Application ◽

Nor Flash

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Transferred-substrate HBTs with 250 GHz current-gain cutoff frequency

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) ◽

10.1109/iedm.1998.746442 ◽

2002 ◽

Cited By ~ 4

Author(s):

D. Mensa ◽

Q. Lee ◽

J. Guthrie ◽

S. Jaganathan ◽

M.J.W. Rodwell

Keyword(s):

Cutoff Frequency ◽

Current Gain

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A new dynamic-threshold SOI device having an embedded resistor and a merged body-bias-control transistor

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) ◽

10.1109/iedm.1998.746388 ◽

2002 ◽

Cited By ~ 3

Author(s):

M. Horiuchi

Keyword(s):

Dynamic Threshold ◽

Body Bias

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Fabrication method for IC-oriented Si twin island single electron transistors

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) ◽

10.1109/iedm.1998.746294 ◽

2002 ◽

Cited By ~ 2

Author(s):

Y. Ono ◽

Y. Takahashi ◽

M. Yamazaki ◽

M. Nagase ◽

H. Namatsu ◽

...

Keyword(s):

Single Electron ◽

Fabrication Method ◽

Single Electron Transistors ◽

Electron Transistors

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Multiple gate oxide thickness for 2 GHz system-on-a-chip technologies

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) ◽

10.1109/iedm.1998.746427 ◽

2002 ◽

Cited By ~ 2

Author(s):

C.T. Liu ◽

Y. Ma ◽

M. Oh ◽

P.W. Diodato ◽

K.R. Stiles ◽

...

Keyword(s):

Gate Oxide ◽

Oxide Thickness ◽

Gate Oxide Thickness ◽

System On A Chip

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Optimization guidelines for epitaxial collectors of advanced BJT's with improved breakdown voltage and speed

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) ◽

10.1109/iedm.1998.746463 ◽

2002 ◽

Cited By ~ 3

Author(s):

P. Palestri ◽

C. Fiegna ◽

L. Selmi ◽

G.A.M. Hurkx ◽

J.W. Slotboom ◽

...

Keyword(s):

Breakdown Voltage

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Physical and chemical analytical instruments far failure analyses in Gbit devices

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) ◽

10.1109/iedm.1998.746366 ◽

2002 ◽

Cited By ~ 5

Author(s):

Y. Mitsui ◽

F. Yano ◽

Y. Nakamura ◽

K. Kimoto ◽

T. Hasegawa ◽

...

Keyword(s):

Analytical Instruments ◽

Physical And Chemical

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High performance pMOSFET with BF/sub 3/ plasma doped gate/source/drain and S/D extension

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) ◽

10.1109/iedm.1998.746439 ◽

2002 ◽

Cited By ~ 6

Author(s):

J.M. Ha ◽

J.W. Park ◽

W.S. Kim ◽

S.P. Kikm ◽

W.S. Song ◽

...

Keyword(s):

High Performance

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Stress analysis of shallow trench isolation for 256 M DRAM and beyond

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) ◽

10.1109/iedm.1998.746300 ◽

2002 ◽

Cited By ~ 9

Author(s):

T. Kuroi ◽

T. Uchida ◽

K. Horita ◽

M. Sakai ◽

Y. Inoue ◽

...

Keyword(s):

Stress Analysis ◽

Shallow Trench Isolation ◽

Trench Isolation

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International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Improving gate oxide integrity (GOI) of a W/WNx/dual-poly Si stacked-gate by using wet-hydrogen oxidation in 0.14-μm CMOS devices

Novel 0.44 μm/sup 2/ Ti-salicide STI cell technology for high-density NOR flash memories and high performance embedded application

Transferred-substrate HBTs with 250 GHz current-gain cutoff frequency

A new dynamic-threshold SOI device having an embedded resistor and a merged body-bias-control transistor

Fabrication method for IC-oriented Si twin island single electron transistors

Multiple gate oxide thickness for 2 GHz system-on-a-chip technologies

Optimization guidelines for epitaxial collectors of advanced BJT's with improved breakdown voltage and speed

Physical and chemical analytical instruments far failure analyses in Gbit devices

High performance pMOSFET with BF/sub 3/ plasma doped gate/source/drain and S/D extension

Stress analysis of shallow trench isolation for 256 M DRAM and beyond

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International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Improving gate oxide integrity (GOI) of a W/WNx/dual-poly Si stacked-gate by using wet-hydrogen oxidation in 0.14-μm CMOS devices

Novel 0.44 μm/sup 2/ Ti-salicide STI cell technology for high-density NOR flash memories and high performance embedded application

Transferred-substrate HBTs with 250 GHz current-gain cutoff frequency

A new dynamic-threshold SOI device having an embedded resistor and a merged body-bias-control transistor

Fabrication method for IC-oriented Si twin island single electron transistors

Multiple gate oxide thickness for 2 GHz system-on-a-chip technologies

Optimization guidelines for epitaxial collectors of advanced BJT's with improved breakdown voltage and speed

Physical and chemical analytical instruments far failure analyses in Gbit devices

High performance pMOSFET with BF/sub 3/ plasma doped gate/source/drain and S/D extension

Stress analysis of shallow trench isolation for 256 M DRAM and beyond

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)
Latest Publications