VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology
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Published By Springer Berlin Heidelberg

9783642450723, 9783642450730

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-642-45073-0_12 ◽

2013 ◽

pp. 217-233

Author(s):

Neil Di Spigna ◽

Daniel Schinke ◽

Srikant Jayanti ◽

Veena Misra ◽

Paul Franzon

Keyword(s):

Memory Device ◽

Experimental Characterization ◽

Floating Gates

An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-642-45073-0_5 ◽

2013 ◽

pp. 88-106 ◽

Cited By ~ 2

Author(s):

Jeremy Constantin ◽

Ahmed Dogan ◽

Oskar Andersson ◽

Pascal Meinerzhagen ◽

Joachim Rodrigues ◽

...

Keyword(s):

Compressed Sensing ◽

Low Power ◽

Ultra Low Power ◽

Power Application ◽

Application Specific

CMOS Implementation of Threshold Gates with Hysteresis

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-642-45073-0_11 ◽

2013 ◽

pp. 196-216 ◽

Cited By ~ 2

Author(s):

Farhad A. Parsan ◽

Scott C. Smith

Keyword(s):

Cmos Implementation

Configurable Low-Latency Interconnect for Multi-core Clusters

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-642-45073-0_6 ◽

2013 ◽

pp. 107-124 ◽

Cited By ~ 1

Author(s):

Giulia Beanato ◽

Igor Loi ◽

Giovanni De Micheli ◽

Yusuf Leblebici ◽

Luca Benini

Keyword(s):

Low Latency

Spatially-Varying Image Warping: Evaluations and VLSI Implementations

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-642-45073-0_4 ◽

2013 ◽

pp. 64-87

Author(s):

Pierre Greisen ◽

Michael Schaffner ◽

Danny Luu ◽

Val Mikos ◽

Simon Heinzle ◽

...

Keyword(s):

Image Warping ◽

Spatially Varying

SEU-Aware Low-Power Memories Using a Multiple Supply Voltage Array Architecture

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-642-45073-0_10 ◽

2013 ◽

pp. 181-195 ◽

Cited By ~ 1

Author(s):

Seokjoong Kim ◽

Matthew R. Guthaus

Keyword(s):

Low Power ◽

Supply Voltage ◽

Array Architecture

On the Automatic Generation of Software-Based Self-Test Programs for Functional Test and Diagnosis of VLIW Processors

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-642-45073-0_9 ◽

2013 ◽

pp. 162-180 ◽

Cited By ~ 1

Author(s):

Davide Sabena ◽

Luca Sterpone ◽

Matteo Sonza Reorda

Keyword(s):

Automatic Generation ◽

Functional Test ◽

Vliw Processors ◽

Self Test

Fault-Tolerant Techniques to Manage Yield and Power Constraints in Network-on-Chip Interconnections

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-642-45073-0_8 ◽

2013 ◽

pp. 144-161

Author(s):

Anelise Kologeski ◽

Caroline Concatto ◽

Fernanda Lima Kastensmidt ◽

Luigi Carro

Keyword(s):

Fault Tolerant ◽

Network On Chip ◽

Power Constraints ◽

On Chip

FPGA-Based High-Speed Authenticated Encryption System

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-642-45073-0_1 ◽

2013 ◽

pp. 1-20 ◽

Cited By ~ 1

Author(s):

Michael Muehlberghuber ◽

Christoph Keller ◽

Frank K. Gürkaynak ◽

Norbert Felber

Keyword(s):

High Speed ◽

Authenticated Encryption

A Hexagonal Processor and Interconnect Topology for Many-Core Architecture with Dense On-Chip Networks

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-642-45073-0_7 ◽

2013 ◽

pp. 125-143 ◽

Cited By ~ 1

Author(s):

Zhibin Xiao ◽

Bevan Baas

Keyword(s):

On Chip ◽

Many Core

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication TechnologyLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer Berlin Heidelberg

Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates

An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing

CMOS Implementation of Threshold Gates with Hysteresis

Configurable Low-Latency Interconnect for Multi-core Clusters

Spatially-Varying Image Warping: Evaluations and VLSI Implementations

SEU-Aware Low-Power Memories Using a Multiple Supply Voltage Array Architecture

On the Automatic Generation of Software-Based Self-Test Programs for Functional Test and Diagnosis of VLIW Processors

Fault-Tolerant Techniques to Manage Yield and Power Constraints in Network-on-Chip Interconnections

FPGA-Based High-Speed Authenticated Encryption System

A Hexagonal Processor and Interconnect Topology for Many-Core Architecture with Dense On-Chip Networks

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - IFIP Advances in Information and Communication Technology
Latest Publications