Flexible Crossbar-Structured Resistive Memory Arrays on Plastic Substrates via Inorganic-Based Laser Lift-Off

2014 ◽  
Vol 26 (44) ◽  
pp. 7480-7487 ◽  
Author(s):  
Seungjun Kim ◽  
Jung Hwan Son ◽  
Seung Hyun Lee ◽  
Byoung Kuk You ◽  
Kwi-Il Park ◽  
...  
2014 ◽  
Vol 26 (44) ◽  
pp. 7418-7418
Author(s):  
Seungjun Kim ◽  
Jung Hwan Son ◽  
Seung Hyun Lee ◽  
Byoung Kuk You ◽  
Kwi-Il Park ◽  
...  

2021 ◽  
pp. 2000222
Author(s):  
Shruti Nirantar ◽  
Md Ataur Rahman ◽  
Edwin Mayes ◽  
Madhu Bhaskaran ◽  
Sumeet Walia ◽  
...  

2015 ◽  
Vol 62 (6) ◽  
pp. 2606-2612 ◽  
Author(s):  
Debayan Mahalanabis ◽  
Rui Liu ◽  
Hugh J. Barnaby ◽  
Shimeng Yu ◽  
Michael N. Kozicki ◽  
...  

2015 ◽  
Vol 62 (10) ◽  
pp. 3160-3167 ◽  
Author(s):  
Haitong Li ◽  
Bin Gao ◽  
Hong-Yu Henry Chen ◽  
Zhe Chen ◽  
Peng Huang ◽  
...  

Author(s):  
Wei Xue ◽  
Tianhong Cui

The fabrication and characterization of single-walled carbon nanotube (SWNT) multilayers, micropatterns and interconnections on plastic substrates are reported in this paper. The SWNT-based multilayers and devices are fabricated with a simple, fast, inexpensive, low-temperature, and highly efficient technique combining layer-by-layer (LbL) nano self-assembly, microlithography, and lift-off techniques. The SWNT multilayers are alternating layers of SWNTs and poly (dimethyldiallylammonium chloride) (PDDA). Lithography and lift-off techniques are used to pattern the SWNT multilayers. SWNT microstructures with linewidth of 5 μm are fabricated and characterized. The thickness of a (PDDA/SWNT) bi-layer is approximately 76 Å. Two-terminal SWNT thin film based interconnections are fabricated on flexible substrates. Current-voltage (I-V) characterization and four-point probe measurement show that the resistance of the interconnection is nonlinearly inversely proportional to the number of the assembled SWNT layers. The nano-assembled polymer/SWNT composite can be used in many applications due to its low cost, light weight, and long lifetime.


2020 ◽  
Vol 67 (11) ◽  
pp. 4611-4615
Author(s):  
Tommaso Zanotti ◽  
Cristian Zambelli ◽  
Francesco Maria Puglisi ◽  
Valerio Milo ◽  
Eduardo Perez ◽  
...  

2007 ◽  
Vol 989 ◽  
Author(s):  
I-Chun Cheng ◽  
Sigurd Wagner

AbstractWe demonstrated self-aligned nanocrystalline silicon (nc-Si:H) n-channel thin film transistors (TFTs) with directly deposited n+ layer. The silicon layers were deposited by plasma-enhanced chemical vapor deposition at a substrate temperature of 150°C. The TFTs were made in a staggered top-gate, bottom-source/drain geometry with a seed layer underneath. The self-alignment of top-gate to the bottom-source/drain was achieved by backside exposure photolithography through the glass substrate and the silicon layers, followed by a lift-off process. An extent of gate to source/drain overlap of 1.5 mm was obtained. The self-aligned TFTs have similar characteristics to their non-self-aligned counterpart. This result represents an important step toward directly deposited nc-Si:H TFT backplanes on plastic substrates.


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