Self-Aligned Nanocrystalline Silicon Thin-Film Transistor With Deposited n+ Source/Drain Layer

2007 ◽  
Vol 989 ◽  
Author(s):  
I-Chun Cheng ◽  
Sigurd Wagner

AbstractWe demonstrated self-aligned nanocrystalline silicon (nc-Si:H) n-channel thin film transistors (TFTs) with directly deposited n+ layer. The silicon layers were deposited by plasma-enhanced chemical vapor deposition at a substrate temperature of 150°C. The TFTs were made in a staggered top-gate, bottom-source/drain geometry with a seed layer underneath. The self-alignment of top-gate to the bottom-source/drain was achieved by backside exposure photolithography through the glass substrate and the silicon layers, followed by a lift-off process. An extent of gate to source/drain overlap of 1.5 mm was obtained. The self-aligned TFTs have similar characteristics to their non-self-aligned counterpart. This result represents an important step toward directly deposited nc-Si:H TFT backplanes on plastic substrates.

2003 ◽  
Vol 769 ◽  
Author(s):  
I-Chun Cheng ◽  
Steven Allen ◽  
Sigurd Wagner

AbstractThin film transistors of nanocrystalline silicon (nc-Si:H) are made in the staggered topgate, bottom-source/drain geometry. To achieve both high carrier mobility and low off current, the nc-Si:H channel material must be kept thin but comprise a contiguous 10-nm thick crystalline layer at its top. We study this electrically most interesting top layer of the nc-Si:H channel film by AFM and SEM. Introducing an nc-Si:H seed layer underneath the TFT promotes the structural evolution of the nc-Si:H channel layer and raises the electron field effect mobility up to 40 cm2V-1s-1.


2004 ◽  
Vol 814 ◽  
Author(s):  
Alex Kattamis ◽  
I-Chun Cheng ◽  
Steve Allen ◽  
Sigurd Wagner

AbstractNanocrystalline silicon is a candidate material for fabricating thin film transistors with high carrier mobilities on plastic substrates. A major issue in the processing of nanocrystalline silicon thin film transistors (nc-Si:H TFTs) at ultralow temperatures is the quality of the SiO2gate dielectric. SiO2deposited at less than 250°C by radio frequency plasma enhanced chemical vapor deposition (rf-PECVD), and not annealed at high temperature after deposition, exhibits high leakage current and voltage shifts when incorporated into TFT's. Secondary ion mass spectrometry (SIMS) measurements show that the hydrogen concentration (NH) in PECVD oxide deposited at 150°C on crystalline silicon (x-Si) is ∼ 0.8 at. %. This is much higher than in thermal oxides on x-Si, which display concentrations of less than 0.003 at. %. The leakage current density for thermal oxides on x-Si at a bias of 10 V is ∼9×10−6A/cm2whereas for 200°C PECVD oxides on nc-Si:H the current is ∼1×10−4A/cm2. As the temperature of the SiO2deposition is reduced to 150°C the current density rises by up to two orders of magnitude more. The H which is suspected to cause the leakage current across the PECVD oxide originates from the nc-Si:H substrate and the SiH4source gas. We analyzed the 300-nm gate oxide in capacitor structures of Al / SiO2/n+nc-Si:H / Cr / glass, Al / SiO2/ n+nc-Si:H / x-Si, and Al / SiO2/ x-Si. Vacuum annealing the nc-Si:H prior to PECVD of the oxide drives H out of the nc-Si:H film and reduces the amount of H incorporated into the oxide that is deposited on top. SiO2film deposition from SiH4and N2O at high He dilution has a still greater effect on lowering NH. The leakage current at a 10 V bias dropped from ∼1×10−4A/cm2to about ∼2×10−6A/cm2using He dilution at 250°C, and the vacuum anneal of the nc-Si:H lowered it by an additional factor of two. Thus we observe that both the nc-Si:H anneal and the SiO2deposition at high He dilution lessen the gate leakage current.


2008 ◽  
Vol 39 (1) ◽  
pp. 1262 ◽  
Author(s):  
Sun-Jae Kim ◽  
Sang-Myeon Han ◽  
Seung-Hee Kuk ◽  
Dong-Won Kang ◽  
Tae-Jun Ha ◽  
...  

1998 ◽  
Vol 507 ◽  
Author(s):  
Yue Kuo ◽  
K. Latzko

ABSTRACTPlasma enhanced chemical vapor deposition of phosphorus-doped n+ silicon film over a wide range of process conditions has been studied. The deposited films were characterized with SIMS, Raman, and XRD. An unusually abrupt change of resistivity over a small SiH4(1% PH3) flow rate has been observed and was correlated to the variation of the film's morphology from amorphous to micrycrystalline. The grains are less than 50 Å in size and has strong <111> orientation. Amorphous silicon thin film transistors with microcrystalline n+ source and drain contacts have consistently good device characteristics. However, the contact resistance is comparable to the channel resistance when the channel length approaches 1 micrometer.


1996 ◽  
Vol 452 ◽  
Author(s):  
T. Toyama ◽  
T. Yamamoto ◽  
T. Matsui ◽  
H. Okamoto

AbstractVisible electroluminescence (EL) has been achieved on the entirely solid state thin film light emitting diode (TFLED) employing electrochemically anodized nanocrystalline Si (nc-Si) as a light emitting active layer. The TFLED consisting of p-type nc-Si, and intrinsic and n-type amorphous layers was fabricated on a SnO2-coated glass substrate. The nc-Si was formed in HF aqueous solution from boron doped microcrystalline Si (μc-Si) deposited by rf plasma chemical vapor deposition (CVD). The TFLED exhibits clear rectification with a forward threshold voltage of about 1.5 V, whereas visible EL emission is observed upon applying reverse bias voltages. The diode ideality factor is more than 2, and the light output increases with the square of the diode current. The EL emission color is orange-red and the spectral peak energy is 1.8 eV.


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