Paper No S12.4: Effect of Plasma Power of Plasma Enhanced Atomic Layer Deposition Process for Gate Insulator Deposition in Top-Gate Thin-Film Transistors

2015 ◽  
Vol 46 (S1) ◽  
pp. 54-54 ◽  
Author(s):  
J. B. Ko ◽  
H. I. Yeom ◽  
C.-S. Hwang ◽  
S. Cho ◽  
S.-H. K. Park
RSC Advances ◽  
2018 ◽  
Vol 8 (44) ◽  
pp. 25014-25020 ◽  
Author(s):  
So-Jung Yoon ◽  
Nak-Jin Seong ◽  
Kyujeong Choi ◽  
Woong-Chul Shin ◽  
Sung-Min Yoon

Bias temperature stress stabilities of thin-film transistors (TFTs) using In–Ga–Zn–O (IGZO) channels prepared by the atomic layer deposition process were investigated with varying channel thicknesses (10 and 6 nm).


2007 ◽  
Vol 515 (12) ◽  
pp. 5109-5112 ◽  
Author(s):  
S.-W. Jeong ◽  
H.J. Lee ◽  
K.S. Kim ◽  
M.T. You ◽  
Y. Roh ◽  
...  

2009 ◽  
Vol 94 (14) ◽  
pp. 142107 ◽  
Author(s):  
J. B. Kim ◽  
C. Fuentes-Hernandez ◽  
W. J. Potscavage ◽  
X.-H. Zhang ◽  
B. Kippelen

Sign in / Sign up

Export Citation Format

Share Document