Quadrature Phase Error and Amplitude Imbalance Effects on Digital Demodulator Performance

1996 ◽  
pp. 195-206
Author(s):  
J. J. Wojtiuk ◽  
M. Rice
Keyword(s):  
Phase Error ◽  
Quadrature Phase

Monitoring Quadrature Phase Error and Gain Mismatch Using Noise

1994 ◽  
Vol 108 (2) ◽  
pp. 230-233 ◽  
Author(s):  
B.H. Suits ◽  
A.B. Kostinski ◽  
M.D. Kulkarni
Keyword(s):  
Phase Error ◽  
Quadrature Phase

scholarly journals Voltage Controlled Delay Line with Phase Quadrature Outputs for [0.9-4]GHz Factorial Delay Locked Loop Dedicated to Zero-IF Multi-Standard Local Oscillator

2010 ◽  
Vol 5 (1) ◽  
pp. 23-32
Author(s):  
Cedric Majek ◽  
Pierre-Olivier Lucas De Peslouan ◽  
André Mariano ◽  
Hervé Lapuyade ◽  
Yann Deval ◽  
...  
Keyword(s):  
Phase Noise ◽  
Delay Line ◽  
Phase Error ◽  
Local Oscillator ◽  
Settling Time ◽  
Ring Oscillator ◽  
Delay Locked Loop ◽  
Measurement Results ◽  
Quadrature Phase ◽  
Soi Technology

This paper presents the design and the measurement results of a novel Voltage Controlled DelayLine (VCDL) dedicated to an original architecture of Delay Locked Loop (DLL): the Factorial DelayLocked Loop (F-DLL). Based on the multiphase ring oscillator technique, the proposed VCDL offers,among others, two outputs in phase quadrature. These last ones allow the F-DLL to be zero-IF compliantand becomes a good candidate for multi-standard local oscillator. The proposed circuit hasbeen fabricated in a 130nm CMOS-SOI technology from STMicroelectronics. Measurement resultsconfirm the low quadrature phase error of the topology (inferior to 5°) and the ability of the F-DLL tosynthesize the [0.9-4] GHz band, being suited for GSM up to WIMAX applications, while offering veryinteresting performances in term of phase noise and settling time.

1–3-GHz Self-Aligned Open-Loop Local Quadrature Phase Generator With Phase Error Below 0.4°

2020 ◽  
Vol 68 (8) ◽  
pp. 3510-3518
Author(s):  
Michael Kalcher ◽  
Daniel Gruber ◽  
Davide Ponton
Keyword(s):  
Phase Error ◽  
Open Loop ◽  
Quadrature Phase

Homodyne laser interferometer involving minimal quadrature phase error to obtain subnanometer nonlinearity

2016 ◽  
Vol 55 (25) ◽  
pp. 7086 ◽  
Author(s):  
Junning Cui ◽  
Zhangqiang He ◽  
Yuanwei Jiu ◽  
Jiubin Tan ◽  
Tao Sun
Keyword(s):  
Laser Interferometer ◽  
Phase Error ◽  
Quadrature Phase

RF Phase Error Built-In-Self-Test for A GSM SOC

2008 ◽  
Vol 1 (4) ◽  
pp. 39-44
Author(s):  
Dallas Webster ◽  
Loi Phan ◽  
Oren Eliezer ◽  
Rick Hudgens ◽  
Donald Lie
Keyword(s):  
Phase Error ◽  
Self Test ◽  
Built In Self Test

РАЗРАБОТКА СВЧ МОНОЛИТНЫХ ИНТЕГРАЛЬНЫХ СХЕМ МИЛЛИМЕТРОВОГО ДИАПАЗОНА НА ОСНОВЕ GAAS ДЛЯ ПРИМЕНЕНИЯ В СОВРЕМЕННЫХ ИНФОРМАЦИОННОКОММУНИКАЦИОННЫХ СИСТЕМАХ НОВОГО ПОКОЛЕНИЯ (5G)

2020 ◽  
Vol 96 (3s) ◽  
pp. 321-324
Author(s):  
Е.В. Ерофеев ◽  
Д.А. Шишкин ◽  
В.В. Курикалов ◽  
А.В. Когай ◽  
И.В. Федин
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Integrated Circuit ◽  
Phase Shifter ◽  
Phase Error ◽  
Microwave Integrated Circuit ◽  
Gain Compression ◽  
Monolithic Microwave Integrated Circuit ◽  
And Performance ◽  
Power Capability

В данной работе представлены результаты разработки СВЧ монолитной интегральной схемы шестиразрядного фазовращателя и усилителя мощности диапазона частот 26-30 ГГц. СКО ошибки по фазе и амплитуде фазовращателя составили 1,2 град. и 0,13 дБ соответственно. Максимальная выходная мощность и КПД по добавленной мощности усилителя в точке сжатия Ку на 1 дБ составили 30 дБм и 20 % соответственно. This paper describes the design, layout, and performance of 6-bit phase shifter and power amplifier monolithic microwave integrated circuit (MMIC), 26-30 GHz band. Phase shifter MMIC has RMS phase error of 1.2 deg. And RMD amplitude error is 0.13 dB. MMIC power amplifier has output power capability of 30 dBm at 1 dB gain compression (P-1dB) and PAE of 20 %.

FM-CW Signal Phase Error Analysis and Compensation

2015 ◽  
Author(s):  
Y. Deng ◽  
X. Guo ◽  
R. Wang ◽  
C. Hu ◽  
T. Zeng
Keyword(s):  
Error Analysis ◽  
Phase Error ◽  
Signal Phase

A 1.3–4-GHz Quadrature-Phase Digital DLL Using Sequential Delay Control and Reconfigurable Delay Line

2021 ◽  
Vol 56 (6) ◽  
pp. 1886-1896
Author(s):  
Hyunsu Park ◽  
Jincheol Sim ◽  
Yoonjae Choi ◽  
Jonghyuck Choi ◽  
Youngwook Kwon ◽  
...  
Keyword(s):  
Delay Line ◽  
Quadrature Phase ◽  
Delay Control
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