Electronic Device Processing

1995 ◽  
pp. 349-370 ◽  
Author(s):  
Mary Anne Plano
Keyword(s):  
Electronic Device ◽  
Device Processing

Influence of Gate Material and Process on Junctionless FET Subthreshold Performance

2016 ◽  
Vol 6 (2) ◽  
pp. 895
Author(s):  
Munawar A Riyadi ◽  
Irawan D Sukawati ◽  
Teguh Prakoso ◽  
Darjat Darjat
Keyword(s):  
Recent Progress ◽  
Electronic Device ◽  
Threshold Value ◽  
The Other ◽  
Subthreshold Slope ◽  
New Device ◽  
Nano Scale ◽  
Device Processing ◽  
Alternative Materials

The recent progress of dimension scaling of electronic device into nano scale has motivated the invention of alternative materials and structures. One new device that shows great potential to prolong the scaling is junctionless FET (JLFET). In contrast to conventional MOSFETs, JLFET does not require steep junction for source and drain. The device processing directly influence the performance, therefore it is crucial to understand the role of gate processing in JLFET. This paper investigates the influence of gate material and process on subthreshold performance of junctionless FET, by comparing four sets of gate properties and process techniques. The result shows that in terms of subthreshold slope, JLFET approaches near ideal value of 60 mV/decade, which is superior than the SOI FET for similar doping rate. On the other hand, the threshold value shows different tendencies between those types of device.

scholarly journals Influence of Gate Material and Process on Junctionless FET Subthreshold Performance

2016 ◽  
Vol 6 (2) ◽  
pp. 895
Author(s):  
Munawar A Riyadi ◽  
Irawan D Sukawati ◽  
Teguh Prakoso ◽  
Darjat Darjat
Keyword(s):  
Recent Progress ◽  
Electronic Device ◽  
Threshold Value ◽  
The Other ◽  
Subthreshold Slope ◽  
New Device ◽  
Nano Scale ◽  
Device Processing ◽  
Alternative Materials

The recent progress of dimension scaling of electronic device into nano scale has motivated the invention of alternative materials and structures. One new device that shows great potential to prolong the scaling is junctionless FET (JLFET). In contrast to conventional MOSFETs, JLFET does not require steep junction for source and drain. The device processing directly influence the performance, therefore it is crucial to understand the role of gate processing in JLFET. This paper investigates the influence of gate material and process on subthreshold performance of junctionless FET, by comparing four sets of gate properties and process techniques. The result shows that in terms of subthreshold slope, JLFET approaches near ideal value of 60 mV/decade, which is superior than the SOI FET for similar doping rate. On the other hand, the threshold value shows different tendencies between those types of device.

Electronic Cone Illumination with the Conventional Transmission Electron Microscope

1977 ◽  
Vol 35 ◽  
pp. 72-73
Author(s):  
William Krakow
Keyword(s):  
Electronic Device ◽  
Chromatic Aberration ◽  
Objective Lens ◽  
Hollow Cone ◽  
Transmission Electron ◽  
Lissajous Figures ◽  
High Resolution Images ◽  
Imaging Mode ◽  
Diffraction Patterns ◽  
Transmission Microscope

An electronic device has been constructed which manipulates the primary beam in the conventional transmission microscope to illuminate a specimen under a variety of virtual condenser aperture conditions. The device uses the existing tilt coils of the microscope, and modulates the D.C. signals to both x and y tilt directions simultaneously with various waveforms to produce Lissajous figures in the back-focal plane of the objective lens. Electron diffraction patterns can be recorded which reflect the manner in which the direct beam is tilted during exposure of a micrograph. The device has been utilized mainly for the hollow cone imaging mode where the device provides a microscope transfer function without zeros in all spatial directions and has produced high resolution images which are also free from the effect of chromatic aberration. A standard second condenser aperture is employed and the width of the cone annulus is readily controlled by defocusing the second condenser lens.

Resistance Monitor and Control for Vacuum Evaporation of Metals and Carbon

1976 ◽  
Vol 34 ◽  
pp. 572-573
Author(s):  
Russell L. Steere ◽  
Eric F. Erbe ◽  
J. Michael Moseley
Keyword(s):  
Electronic Device ◽  
Point Sources ◽  
High Contrast ◽  
Variable Resistor ◽  
Quality Of Results ◽  
Low Contrast ◽  
Evaporation Source ◽  
And Control ◽  
At Will

We have designed and built an electronic device which compares the resistance of a defined area of vacuum evaporated material with a variable resistor. When the two resistances are matched, the device automatically disconnects the primary side of the substrate transformer and stops further evaporation.This approach to controlled evaporation in conjunction with the modified guns and evaporation source permits reliably reproducible multiple Pt shadow films from a single Pt wrapped carbon point source. The reproducibility from consecutive C point sources is also reliable. Furthermore, the device we have developed permits us to select a predetermined resistance so that low contrast high-resolution shadows, heavy high contrast shadows, or any grade in between can be selected at will. The reproducibility and quality of results are demonstrated in Figures 1-4 which represent evaporations at various settings of the variable resistor.

Digital image processing methods applied to the study of annealing time on semiconductor-metal eutectic composites

1988 ◽  
Vol 46 ◽  
pp. 848-849
Author(s):  
J. Hefter
Keyword(s):  
Image Processing ◽  
Digital Image Processing ◽  
Digital Image ◽  
Electronic Device ◽  
Processing System ◽  
Average Diameter ◽  
Eutectic Solidification ◽  
Metal Silicide ◽  
The Matrix ◽  
Microscopic Studies

Semiconductor-metal composites, formed by the eutectic solidification of silicon and a metal silicide have been under investigation for some time for a number of electronic device applications. This composite system is comprised of a silicon matrix containing extended metal-silicide rod-shaped structures aligned in parallel throughout the material. The average diameter of such a rod in a typical system is about 1 μm. Thus, characterization of the rod morphology by electron microscope methods is necessitated.The types of morphometric information that may be obtained from such microscopic studies coupled with image processing are (i) the area fraction of rods in the matrix, (ii) the average rod diameter, (iii) an average circularity (roundness), and (iv) the number density (Nd;rods/cm2). To acquire electron images of these materials, a digital image processing system (Tracor Northern 5500/5600) attached to a JEOL JXA-840 analytical SEM has been used.

In situ TEM measurements of the electrical properties of interface dislocations

1992 ◽  
Vol 50 (2) ◽  
pp. 1338-1339
Author(s):  
F. M. Ross ◽  
R. Hull ◽  
D. Bahnck ◽  
J. C. Bean ◽  
L. J. Peticolas ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Electronic Device ◽  
In Situ Tem ◽  
Device Performance ◽  
Misfit Dislocations ◽  
Electrical Characteristics ◽  
Strained Layer ◽  
Transmission Electron ◽  
Interfacial Dislocations

We describe an investigation of the electrical properties of interfacial dislocations in strained layer heterostructures. We have been measuring both the structural and electrical characteristics of strained layer p-n junction diodes simultaneously in a transmission electron microscope, enabling us to correlate changes in the electrical characteristics of a device with the formation of dislocations.The presence of dislocations within an electronic device is known to degrade the device performance. This degradation is of increasing significance in the design and processing of novel strained layer devices which may require layer thicknesses above the critical thickness (hc), where it is energetically favourable for the layers to relax by the formation of misfit dislocations at the strained interfaces. In order to quantify how device performance is affected when relaxation occurs we have therefore been investigating the electrical properties of dislocations at the p-n junction in Si/GeSi diodes.

Growth kinetics of Al2Cu in an Al-1.5Cu thin film by in Situ TEM

1993 ◽  
Vol 51 ◽  
pp. 1172-1173
Author(s):  
M. Park ◽  
S.J. Krause ◽  
S.R. Wilson
Keyword(s):  
Thin Film ◽  
In Situ Tem ◽  
Collector Plate ◽  
Transmission Electron ◽  
Device Processing ◽  
Corrosion Susceptibility ◽  
Precipitation Phenomena ◽  
Semiconductor Chips ◽  
Kinetics Of

Cu alloying in Al interconnection lines on semiconductor chips improves their resistance to electromigration and hillock growth. Excess Cu in Al can result in the formation of Cu-rich Al2Cu (θ) precipitates. These precipitates can significantly increase corrosion susceptibility due to the galvanic action between the θ-phase and the adjacent Cu-depleted matrix. The size and distribution of the θ-phase are also closely related to the film susceptibility to electromigration voiding. Thus, an important issue is the precipitation phenomena which occur during thermal device processing steps. In bulk alloys, it was found that the θ precipitates can grow via the grain boundary “collector plate mechanism” at rates far greater than allowed by volume diffusion. In a thin film, however, one might expect that the growth rate of a θ precipitate might be altered by interfacial diffusion. In this work, we report on the growth (lengthening) kinetics of the θ-phase in Al-Cu thin films as examined by in-situ isothermal aging in transmission electron microscopy (TEM).

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